-
1
-
-
0032629490
-
Practical advances in asynchronous design and in asynchronous/ synchronous interfaces
-
Piscataway, NJ
-
E. Brunvand, S. Nowick, and K. Yun, "Practical Advances in Asynchronous Design and in Asynchronous/Synchronous Interfaces," presented at Design Automation Conference, Piscataway, NJ, 1999.
-
(1999)
Design Automation Conference
-
-
Brunvand, E.1
Nowick, S.2
Yun, K.3
-
2
-
-
0029191713
-
Asynchronous design methodologies: An overview
-
S. Hauck, "Asynchronous Design Methodologies: An Overview," Proceedings of the IEEE, vol. 83, pp. 69-93, 1995.
-
(1995)
Proceedings of the IEEE
, vol.83
, pp. 69-93
-
-
Hauck, S.1
-
4
-
-
0030705777
-
Online testing of statically and dynamically scheduled synthesized systems
-
A. D. Brown, K. R. Baker, and A. C. Williams, "Online testing of statically and dynamically scheduled synthesized systems," IEEE Transactions on Computer Aided Design, vol. 16, pp. 47-57, 1997.
-
(1997)
IEEE Transactions on Computer Aided Design
, vol.16
, pp. 47-57
-
-
Brown, A.D.1
Baker, K.R.2
Williams, A.C.3
-
5
-
-
0035397805
-
Floating point behavioural synthesis
-
Z. A. Baidas, A. D. Brown, and A. C. Williams, "Floating Point Behavioural Synthesis," IEEE Transactions on Computer Aided Design, vol. 20, pp. 828-839, 2001.
-
(2001)
IEEE Transactions on Computer Aided Design
, vol.20
, pp. 828-839
-
-
Baidas, Z.A.1
Brown, A.D.2
Williams, A.C.3
-
6
-
-
0034313221
-
Simultaneous optimisation of dynamic power, area and delay in behavioural synthesis
-
A. C. Williams, A. D. Brown, and M. Zwolinski, "Simultaneous optimisation of dynamic power, area and delay in behavioural synthesis," IEE Proceedings on Computers and Digital Techniques, vol. 147, pp. 383-390, 2000.
-
(2000)
IEE Proceedings on Computers and Digital Techniques
, vol.147
, pp. 383-390
-
-
Williams, A.C.1
Brown, A.D.2
Zwolinski, M.3
-
7
-
-
0027646248
-
Multiple objective optimisation in a behavioural synthesis system
-
K. R. Baker and A. J. Currie, "Multiple Objective Optimisation in a Behavioural Synthesis System," IEE Proceedings - G, vol. 140, pp. 253-260, 1993.
-
(1993)
IEE Proceedings - G
, vol.140
, pp. 253-260
-
-
Baker, K.R.1
Currie, A.J.2
-
10
-
-
84984293356
-
Efficient placement and routing techniques for master slice LSI
-
Minneapolis, Minn
-
H. Shiraishi and F. Hirose, "Efficient Placement and Routing Techniques for Master Slice LSI," presented at Design Automation Conference, Minneapolis, Minn., 1980.
-
(1980)
Design Automation Conference
-
-
Shiraishi, H.1
Hirose, F.2
-
11
-
-
0024682923
-
Force-directed scheduling for the behavioural synthesis of ASIC's
-
P. G. Paulin and J. P. Knight, "Force-Directed Scheduling for the Behavioural Synthesis of ASIC's," IEEE Transactions on Computer Aided Design, vol. 8, pp. 661-679, 1989.
-
(1989)
IEEE Transactions on Computer Aided Design
, vol.8
, pp. 661-679
-
-
Paulin, P.G.1
Knight, J.P.2
-
13
-
-
0042695610
-
AMULET1: A micropipelined ARM
-
San Fransisco
-
S. B. Furber, P. Day, J. D. Garside, N. C. Paver, and J. V. Woods, "AMULET1: A Micropipelined ARM," presented at IEEE Computer Conference (COMPCON), San Fransisco, 1994.
-
(1994)
IEEE Computer Conference (COMPCON)
-
-
Furber, S.B.1
Day, P.2
Garside, J.D.3
Paver, N.C.4
Woods, J.V.5
-
15
-
-
0024645936
-
Petri nets: Properties, analysis and applications
-
T. Murata, "Petri Nets: Properties, Analysis and Applications. " Proceedings of the IEEE, vol. 77, pp. 541-580, 1989.
-
(1989)
Proceedings of the IEEE
, vol.77
, pp. 541-580
-
-
Murata, T.1
-
16
-
-
0001413757
-
Petrify: A tool for manipulating concurrent specifications and synthesis of asynchronous controllers
-
Departement d'Arquitectura de Computadors, Universitat Politecnica de Catalunya
-
J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, and A. Yakovlev, "Petrify: a tool for manipulating concurrent specifications and synthesis of asynchronous controllers," Departement d'Arquitectura de Computadors, Universitat Politecnica de Catalunya, Technical Report 1996.
-
(1996)
Technical Report
-
-
Cortadella, J.1
Kishinevsky, M.2
Kondratyev, A.3
Lavagno, L.4
Yakovlev, A.5
-
17
-
-
0003885785
-
MINIMALIST: An environment for the synthesis, verification and testability of burst-mode asynchronous machines
-
Department of Computer Science, Columbia University
-
R. M. Fuhrer, N. K. Jha, S. N. Nowick, B. Lin, M. Theobald, and L. Plana, "MINIMALIST: An Environment for the Synthesis, Verification and Testability of Burst-Mode Asynchronous Machines," Department of Computer Science, Columbia University, Technical Report CUCS-020-99, 1999.
-
(1999)
Technical Report
, vol.CUCS-020-99
-
-
Fuhrer, R.M.1
Jha, N.K.2
Nowick, S.N.3
Lin, B.4
Theobald, M.5
Plana, L.6
-
18
-
-
0033078504
-
Automatic synthesis of extended burst-mode circuits: Part I (specification and hazard-free implementations)
-
K. Y. Yun and D. L. Dill, "Automatic synthesis of extended burst-mode circuits: part I (specification and hazard-free implementations)," IEEE Transactions on Computer Aided Design, vol. 18, pp. 101-117, 1999.
-
(1999)
IEEE Transactions on Computer Aided Design
, vol.18
, pp. 101-117
-
-
Yun, K.Y.1
Dill, D.L.2
-
19
-
-
0033079019
-
Automatic synthesis of extended burst-mode circuits: Part II (automatic synthesis)
-
K. Y. Yun and D. L. Dill, "Automatic synthesis of extended burst-mode circuits: part II (automatic synthesis)," IEEE Transactions on Computer Aided Design, vol. 18, pp. 118-132, 1999.
-
(1999)
IEEE Transactions on Computer Aided Design
, vol.18
, pp. 118-132
-
-
Yun, K.Y.1
Dill, D.L.2
-
20
-
-
0042695608
-
The balsa asynchronous circuit synthesis system
-
Tübingen, Germany
-
A. Bardsley and D. A. Edwards, "The Balsa Asynchronous Circuit Synthesis System," presented at Forum on Design Languages, Tübingen, Germany, 2000.
-
(2000)
Forum on Design Languages
-
-
Bardsley, A.1
Edwards, D.A.2
-
22
-
-
0010900079
-
The tangram framework (embedded tutorial): Asynchronous circuits for low power
-
Yokohama, Japan
-
J. Kessels and A. Peeters, "The tangram framework (embedded tutorial): asynchronous circuits for low power," presented at Asia South Pacific Design Automation Conference, Yokohama, Japan, 2001.
-
(2001)
Asia South Pacific Design Automation Conference
-
-
Kessels, J.1
Peeters, A.2
-
23
-
-
77957956814
-
SPA - A synthesisable amulet core for smartcard applications
-
Manchester, U.K.
-
L. Plana, P. A. Riocreux, W. J. Bainbridge, A. Bardsley, J. D. Garside, and S. Temple, "SPA - A Synthesisable Amulet Core for Smartcard Applications," presented at International Symposium on Asynchronous Circuits and Systems, Manchester, U.K., 2002.
-
(2002)
International Symposium on Asynchronous Circuits and Systems
-
-
Plana, L.1
Riocreux, P.A.2
Bainbridge, W.J.3
Bardsley, A.4
Garside, J.D.5
Temple, S.6
-
25
-
-
77957939771
-
High-level asynchronous system design using the ACK framework
-
Eilat, Israel
-
H. Jacobson, E. Brunvand, G. Gopalakrishnan, and P. Kudva, "High-Level Asynchronous System Design using the ACK Framework," presented at International Symposium on Advanced Research in Asynchronous Circuits and Systems, Eilat, Israel, 2000.
-
(2000)
International Symposium on Advanced Research in Asynchronous Circuits and Systems
-
-
Jacobson, H.1
Brunvand, E.2
Gopalakrishnan, G.3
Kudva, P.4
-
26
-
-
77957975766
-
Asynchronous design using commercial HDL synthesis tools
-
Israel
-
M. Ligthart, K. Fant, R. Smith, A. Taubin, and A. Kondratyev, "Asynchronous Design Using Commercial HDL Synthesis Tools," presented at International Symposium on Advanced Research in Asynchronous Circuits and Systems, Israel, 2000.
-
(2000)
International Symposium on Advanced Research in Asynchronous Circuits and Systems
-
-
Ligthart, M.1
Fant, K.2
Smith, R.3
Taubin, A.4
Kondratyev, A.5
-
27
-
-
0008870342
-
The design of an asynchronous VHDL synthesizer
-
Los Alamitos
-
S.-Y. Tan, S. B. Furber, and W.-F. Yen, "The Design of an Asynchronous VHDL Synthesizer," presented at Design, Automation and Test in Europe, Los Alamitos, 1998.
-
(1998)
Design, Automation and Test in Europe
-
-
Tan, S.-Y.1
Furber, S.B.2
Yen, W.-F.3
-
28
-
-
0034842165
-
Transformations for the synthesis and optimization of asynchronous distributed control
-
Las Vegas, Nevada
-
M. Theobald and S. M. Nowick, "Transformations for the Synthesis and Optimization of Asynchronous Distributed Control," presented at Design Automation Conference, Las Vegas, Nevada, 2001.
-
(2001)
Design Automation Conference
-
-
Theobald, M.1
Nowick, S.M.2
-
31
-
-
2942669979
-
A concurrent model for de-synchronization
-
Laguna Beach, California, USA
-
J. Cortadella, A. Kondratyev, L. Lavagno, and C. Sotiriou, "A concurrent model for de-synchronization," presented at International Workshop on Logic Synthesis, Laguna Beach, California, USA, 2003.
-
(2003)
International Workshop on Logic Synthesis
-
-
Cortadella, J.1
Kondratyev, A.2
Lavagno, L.3
Sotiriou, C.4
-
32
-
-
2942693655
-
Behavioral compiler user guide
-
"Behavioral Compiler User Guide," Synopsys 2000.
-
(2000)
Synopsys
-
-
-
34
-
-
2942639611
-
The MOODS behavioural synthesis system
-
Tubingen, Germany
-
A. D. Brown and A. C. Williams, "The MOODS Behavioural Synthesis System," presented at Forum on Design Languages, Tubingen, Germany, 2000.
-
(2000)
Forum on Design Languages
-
-
Brown, A.D.1
Williams, A.C.2
-
36
-
-
2942637429
-
Hierarchical module expansion in a VHDL behavioural synthesis system
-
J. Mermet, Ed.: Kluwer Academic Publishers
-
A. D. Brown, A. C. Williams, and Z. A. Baidas, "Hierarchical Module Expansion in a VHDL Behavioural Synthesis System," in Electronic Chips & Systems Design Languages, J. Mermet, Ed.: Kluwer Academic Publishers, 2001, pp. 249-260.
-
(2001)
Electronic Chips & Systems Design Languages
, pp. 249-260
-
-
Brown, A.D.1
Williams, A.C.2
Baidas, Z.A.3
-
38
-
-
0030654982
-
Two-phase asynchronous pipeline control
-
Eindhoven, The Netherlands
-
S. S. Appleton, A. V. Morton, and M. J. Liebelt, "Two-Phase Asynchronous Pipeline Control," presented at International Symposium on Advanced Research in Asynchronous Circuits and Systems, Eindhoven, The Netherlands, 1997.
-
(1997)
International Symposium on Advanced Research in Asynchronous Circuits and Systems
-
-
Appleton, S.S.1
Morton, A.V.2
Liebelt, M.J.3
-
39
-
-
0030173207
-
Four-phase micropipeline latch control circuits
-
S. B. Furber and P. Day, "Four-Phase Micropipeline Latch Control Circuits," IEEE Transactions on VLSI Systems, vol. 4, pp. 247-253, 1996.
-
(1996)
IEEE Transactions on VLSI Systems
, vol.4
, pp. 247-253
-
-
Furber, S.B.1
Day, P.2
-
41
-
-
2942641794
-
Designing DES with MOODS
-
LME Design Automation Ltd
-
A. Rushton, "Designing DES with MOODS," LME Design Automation Ltd, Internal Report 2001.
-
(2001)
Internal Report
-
-
Rushton, A.1
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