The design of an asynchronous VHDL synthesizer

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 1998, Pages 44-51

  Tan, Sun Yen ^a   Furber, Stephen B ^a   Yen, Wen Fang ^b  

^a UNIVERSITY OF MANCHESTER   (United Kingdom)

^b NATIONAL TAIPEI UNIVERSITY OF TECHNOLOGY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

ASYNCHRONOUS CIRCUITS; ASYNCHRONOUS MICROPROCESSOR; DESIGN TIME; MANCHESTER; MICRO-PIPELINES; MICROPIPELINE CIRCUITS; VHDL DESCRIPTION;

COMPUTER HARDWARE DESCRIPTION LANGUAGES; DESIGN;

ASYNCHRONOUS SEQUENTIAL LOGIC;

EID: 0008870342     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.1998.655835     Document Type: Conference Paper

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