Modelling and simulation of charging and discharging processes in nanocrystal flash memories during program and erase operations

Solid-State Electronics

Volumn 49, Issue 11 SPEC. ISS., 2005, Pages 1745-1753

  Campera, Andrea ^a   Iannaccone, Giuseppe ^a  

^a UNIVERSITY OF PISA   (Italy)

Author keywords

Erase; Flash memory; Nanocrystal memory; Non volatile memory; Program

Indexed keywords

COMPUTER SIMULATION; DIELECTRIC MATERIALS; INTERFACES (MATERIALS); NANOSTRUCTURED MATERIALS; SILICA; SILICON;

ERASE; NANOCRYSTAL MEMORY; NON-VOLATILE MEMORY; PROGRAM;

FLASH MEMORY;

EID: 28044455851     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sse.2005.10.002     Document Type: Article

References (13)

1. Tiwari S, Rana F, Chan K, Hanafi H, Wei Chan, Buchanan D., Volatile and non-volatile memories in silicon with nanocrystal storage. In: IEDM, 10-13 December 1995. p. 521-4.
2. J. De Blauwe Nanocrystal nonvolatile memory devices IEEE Trans Nanotechnol 1 1 2002 72 77
3. De Salvo B et al., How far will silicon nanocrystals push the scaling limits of NVMs technologies? In: IEDM '03 Technical Digest 8-10 December 2003. p. 26.1.1-4.
4. B. De Salvo Experimental and theoretical investigation of nonvolatile memory data-retention IEEE Trans Electron Dev 46 7 1999 1518 1524
5. L. Perniola Analytical model of the effects of a nonuniform distribution of stored charge on the electrical characteristics of discrete-trap nonvolatile memories IEEE Trans Nanotechnol 4 3 2005 360 368
6. Monzio Compagnoni C et al. Program/erase dynamics and channel conduction in nanocrystal memories. In: IEDM '03 Technical Digest. IEEE International 8-10 December 2003. p. 22.4.1-4.
7. F. Rana, S. Tiwari, and J.J. Welser Kinetic modelling of electron tunneling processes in quantum dots coupled to field-effect transistors Superlattices Microstruct 23 3-4 1998 757 770
8. J.S. de Sousa, A.V. Thean, J.P. Leburton, and V.N. Freire Three-dimensional self-consistent simulation of the charging time response in silicon nanocrystal flash memories J Appl Phys 92 2002 6182
9. M. She, and T.J. King Impact of crystal size and tunnel dielectric on semiconductor nanocrystal memory performance IEEE Trans Electron Dev 50 9 2003 1934 1940
10. G. Iannaccone, F. Crupi, B. Neri, and S. Lombardo Theory and experiment of suppressed shot noise in stress-induced leakage currents IEEE Trans Electron Dev 50 5 2003 1363 1369
11. G. Iannaccone, and P. Coli Three-dimensional simulation of nanocrystal flash memories Appl Phys Lett 78 2001 2046
12. Shi Y et al. Silicon nano-crystals based MOS memory and effects id-state and integratedof traps on charge storage characteristics. In: Sol circuit technology, proceedings, 1998 5th international conference on 21-23 October 1998. p. 838-41.
13. Y.H. Kwon Memory effects related to deep levels in metal-oxide- semiconductor structure with nanocrystalline Si Appl Phys Lett 80 2002 2502