Silicon nano-crystals based MOS memory and effects of traps on charge storage characteristics

International Conference on Solid-State and Integrated Circuit Technology Proceedings

Volumn , Issue , 1998, Pages 838-841

  Shi, Y ^a   Gu, S L ^a   Yuan, X L ^a   Zheng, Y D ^a   Saito, K ^a   Ishikuro, H ^a   Hiramoto, T ^a  

^a NANJING UNIVERSITY   (China)

Author keywords

[No Author keywords available]

Indexed keywords

ANNEALING; CHARGE CARRIERS; CRYSTAL DEFECTS; ELECTRIC FIELD EFFECTS; ELECTRIC POTENTIAL; ELECTRON TRAPS; ELECTRON TUNNELING; MOS DEVICES; NANOSTRUCTURED MATERIALS; SEMICONDUCTING SILICON; SEMICONDUCTOR DEVICE MANUFACTURE;

MOS MEMORY;

SEMICONDUCTOR STORAGE;

EID: 0032226884     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (11)