Experimental and theoretical investigation of nonvolatile memory data-retention

IEEE Transactions on Electron Devices

Volumn 46, Issue 7, 1999, Pages 1518-1524

  De Salvo, Barbara ^b,c   Ghibaudo, Gérard ^a,b,c   Pananakakis, Georges ^b,c   Reimbold, Gilles ^c   Mondond, François ^c,d   Guillaumot, Bernard ^e   Candelier, Philippe ^c,e  

^a IEEE

^b Grenoble INP Phelma   (France)

^c CEA LETI   (France)

^d UNIV GRENOBLE ALPES   (France)

^e STMICROELECTRONICS   (France)

Author keywords

[No Author keywords available]

Indexed keywords

MATHEMATICAL MODELS; PROM; SEMICONDUCTOR STORAGE;

DATA RETENTION; FOWLER-NORDHEIM CURRENT;

NONVOLATILE STORAGE;

EID: 0032628464     PISSN: 00189383     EISSN: None     Source Type: None    
DOI: 10.1109/16.772505     Document Type: Article

References (23)

1. D. L. Crook, "Evolution of VLSI reliability engineering," in Proc. IEEE/IRPS, 1990, p. 2.
2. G. Crisenza, G. Ghidini, and M. Tosi, "Floating gate memories reliability," in Proc. ESREF, 1991, p. 505.
3. P. Candelier, B. De Salvo, F. Martin, B. Guillaumot, and G. Reimbold, "Thinning oxide-nitride-oxide interpoly dielectric (11-13 nm) for 0.25 μm flash cell memories," in Proc. ESSDERC, 1997, p. 264.
4. E. F. Runnion, S. M. Gladstone IV, R. S. Scott, and D. J. Dumin, "Limitation on oxide thicknesses in flash EEPROM applications," in Proc. IEEE/IRPS, 1996, p. 93.
5. 2 using the floating gate technique," IEEE Electron Device Lett., vol. 12, p. 713, Dec. 1991.
6. O. D. Trapp and D. S. Peck, Accelerated Testing Handbook. 5th ed., Technology Associates and D. S. Peck Consulting Corp., Eds., 1987.
7. H. Nozawa and S. Kohyama, "A thermoionic electron emission model for charge retention in SAMOS structures," Jpn. J. Appl. Phys., vol. 21, no. 2, p. L111, 1982.
8. R. M. Alexander, "Accelerated testing in FAMOS devices - 8 K EPROM," in Proc. IEEE/IRPS, 1978, p. 229.
9. C. S. Pan, K. Wu, D. Chin, G. Sery, and J. Kiely, "High-temperature charge loss mechanism in a floating-gate EPROM with an oxide-nitride-oxide (ONO) interpoly stacked dielectric," IEEE Electron Device Lett., vol. 12, p. 506, Sept. 1991.
10. C. S. Pan, K. Wu, and G. Sery, "Physical origin of long-term charge loss in floating-gate EPROM with an interpoly oxide-nitride-oxide stacked dielectric," IEEE Electron Device Lett., vol. 12, p. 51, Feb. 1991.
11. M. Herrmann and A. Schenk, "Field and high-temperature dependence of the long term charge loss in erasable programmable read only memories: Measurements and modeling," J. Appl. Phys., vol. 77, no. 9, p. 4522, 1995.
12. R. E. Shiner, J. M. Caywood, and B. L. Euzent, "Data retention in EPROM's," in Proc. IEEE/IRPS, 1980, p. 238.
13. N. R. Mielke, "New EPROM data-loss mechanisms," in Proc. IEEE/IRPS, 1983, p. 106.
14. C. S. Pan, K. Wu, P. P. Freiberger, A. Chatterjee, and G. Sery, "A scaling methodology for oxide-nitride-oxide interpoly dielectric for EPROM apllications," IEEE Trans. Electron Devices, vol. 37, p. 1439, June 1990.
15. R. Fowler and D. Nordheim, "Electrons emission in intense electric fields," Proc. R. Soc. Lond., vol. 119, p. 173, 1928.
16. L. I. Schiff, Quantum Mechanics. New York: McGraw-Hill, 1968.
17. G. Pananakakis, G. Ghibaudo, R. Kies, and C. Papadas, "Temperature dependence of the Fowler-Nordheim current in metal-oxide-degenerate semiconductor structures," J. Appl. Phys., vol. 78, no. 4, p. 235, 1995.
18. 2 and ONO leakage currents using the floating-gate technique," J. Non-Cryst. Solids, vol. 246, pp. 48-53, 1999to be published.
19. C. Papadas, G. Pananakakis, G. Ghibaudo, C. Riva, F. Pio, and P. Ghezzi, "Modeling of the intrinsic retention characteristics of FLOTOX EEPROM cells under elevated temperature conditions," IEEE Trans. Electron Devices, vol. 42, p. 678, Apr. 1995.
20. B. DeSalvo, G. Ghibaudo, G. Pananakakis, and G. Reimbold, "ONO and NO interpoly dielectric conduction mechanisms," presented at 9th Int. Workshop on Thin Films Dielectrics in Microelectronics, Toulouse France, Mar. 1998;
21. also Microelect. Reliab., vol. 39, pp. 235-239, 1999.
22. 2 and ONO-induced substrate current in silicon field-effect transistors," Solid-State Electron. , vol. 42, no. 10, p. 1839, 1998.
23. J. D. Blauwe, J. V. Houdt, D. Wellekens, R. Degraeve, Ph. Roussel, L. Haspeslagh, L. Deferm, G. Groeseneken, and H. E. Maes, "A new quantitative model to predict SILC-elated disturb characteristics in flash E2PROM devices," in IEDM Tech. Dig., 1996, p. 343.