Evaluation of speed and area of clustered VLIW processors

Proceedings of the IEEE International Conference on VLSI Design

Volumn , Issue , 2005, Pages 557-563

  Terechko, Andrei ^a   Garg, Manish ^a   Corporaal, Henk ^b  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

^b EINDHOVEN UNIVERSITY OF TECHNOLOGY   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

POWER CONSUMPTION; SCALABILITY; VLIW PROCESSORS;

INTEGRATED CIRCUIT LAYOUT; MATHEMATICAL MODELS; VLSI CIRCUITS;

PROGRAM PROCESSORS;

EID: 27944468674     PISSN: 10639667     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICVD.2005.95     Document Type: Conference Paper

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