Test structure design considerations for RF-CV measurements on leaky dielectrics

IEEE Transactions on Semiconductor Manufacturing

Volumn 17, Issue 2, 2004, Pages 150-154

  Schmitz, Jurriaan ^a,b   Cubaynes, Florence N ^a   Havens, Ramon J ^a   De Kort, Randy ^a   Scholten, Andries J ^a   Tiemeijer, Luuk F ^a  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

^b UNIVERSITY OF TWENTE   (Netherlands)

Author keywords

Capacitance voltage (C V); Characterization; CMOS; Direct tunneling; Gate leakage; RF

Indexed keywords

CAPACITANCE; CURRENT VOLTAGE CHARACTERISTICS; ELECTRIC CONDUCTANCE; ELECTRIC POTENTIAL; ELECTRON TUNNELING; ERROR ANALYSIS; LEAKAGE CURRENTS; MOS CAPACITORS;

CAPACITANCE VOLTAGE (C-V) CHARACTERIZATION; DIRECT TUNNELING; GATE LEAKAGE; RF;

DIELECTRIC MATERIALS;

EID: 2642517875     PISSN: 08946507     EISSN: None     Source Type: Journal    
DOI: 10.1109/TSM.2004.826998     Document Type: Conference Paper

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