Using layout technique and direct-tunneling mechanism to promote DC performance of partially depleted SOI devices

IEEE Transactions on Electron Devices

Volumn 51, Issue 5, 2004, Pages 708-713

  Chen, Shiao Shien ^a   Huang Lu, Shiang ^a   Tang, Tien Hao ^a  

^a UNITED MICROELECTRONICS CORPORATION   (Taiwan)

Author keywords

Direct tunneling; Floating body; Kink; Partially depleted silicon on insulator (SOI)

Indexed keywords

ELECTRIC CURRENTS; ELECTRIC POTENTIAL; ELECTRON TUNNELING; GATES (TRANSISTOR); SILICON ON INSULATOR TECHNOLOGY; TRANSCONDUCTANCE;

CONDUCTION BAND; DIRECT TUNNELING MECHANISM; PARTIALLY DEPLETED DEVICES;

MOSFET DEVICES;

EID: 2442564687     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2004.825810     Document Type: Article

References (12)

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