-
1
-
-
0027590476
-
On optimizing VLSI testing for product quality using die-yield prediction
-
Singh, A.D., and Krishna, C.M.: 'On optimizing VLSI testing for product quality using die-yield prediction', IEEE Trans. Comput.-Aided Des., 1993, 12, (5), pp. 695-709
-
(1993)
IEEE Trans. Comput.-Aided Des.
, vol.12
, Issue.5
, pp. 695-709
-
-
Singh, A.D.1
Krishna, C.M.2
-
2
-
-
0348233291
-
Extending integrated circuit models to estimate early-life reliability
-
Barnett, T.S., Singh, A.D., and Nelson, V.P.: 'Extending integrated circuit models to estimate early-life reliability', IEEE Trans. Reliab., 2003, 52, (3), pp. 296-300
-
(2003)
IEEE Trans. Reliab.
, vol.52
, Issue.3
, pp. 296-300
-
-
Barnett, T.S.1
Singh, A.D.2
Nelson, V.P.3
-
3
-
-
0035013704
-
Burn-in failures and local region yield: An integrated yield-reliability model
-
May
-
Barnett, T.S., Singh, A.D., and Nelson, V.P.: 'Burn-in failures and local region yield: an integrated yield-reliability model'. Proc. VLSI Test Symp., May 2001, pp. 326-332
-
(2001)
Proc. VLSI Test Symp.
, pp. 326-332
-
-
Barnett, T.S.1
Singh, A.D.2
Nelson, V.P.3
-
4
-
-
0010401965
-
Yield-reliability modeling: Experimental verification and application to burn-in reduction
-
May
-
Barnett, T.S., Singh, A.D., Grady, M., and Purdy, K.G.: 'Yield-reliability modeling: experimental verification and application to burn-in reduction'. Proc. VLSI Test Symp., May 2002, pp. 75-80
-
(2002)
Proc. VLSI Test Symp.
, pp. 75-80
-
-
Barnett, T.S.1
Singh, A.D.2
Grady, M.3
Purdy, K.G.4
-
5
-
-
0012129528
-
-
Kluwer Academic Publishers
-
Kuo, W., Chien, W.-T.K., and Kim, T.: 'Reliability, yield, and stress burn-in' (Kluwer Academic Publishers, 1998)
-
(1998)
Reliability, Yield, and Stress Burn-in
-
-
Kuo, W.1
Chien, W.-T.K.2
Kim, T.3
-
6
-
-
0026836537
-
Reliability defect detection and screening during processing-theory and implementation
-
Huston, H.H., and Clarke, C.P.: 'Reliability defect detection and screening during processing-theory and implementation'. Proc. Int. Reliability Physics Symp., 1992, pp. 268-275
-
(1992)
Proc. Int. Reliability Physics Symp.
, pp. 268-275
-
-
Huston, H.H.1
Clarke, C.P.2
-
7
-
-
0029700580
-
Relation between yield and reliability of integrated circuits: Experimental results and application to continuous early failure rate reduction programs
-
Kuper, F., van der Pol, J., Ooms, E., Johnson, T., Wijburg, F., Koster, W., and Johnson, D.: 'Relation between yield and reliability of integrated circuits: experimental results and application to continuous early failure rate reduction programs'. Proc. Int. Reliability Physics Symp., 1996, pp. 17-21
-
(1996)
Proc. Int. Reliability Physics Symp.
, pp. 17-21
-
-
Kuper, F.1
Van Der Pol, J.2
Ooms, E.3
Johnson, T.4
Wijburg, F.5
Koster, W.6
Johnson, D.7
-
8
-
-
0031674382
-
Impact of screening of latent defects at electrical test on the yield-reliability relation and application to burn-in elimination
-
van der Pol, J., Ooms, E., van 't Hof, T., and Kuper, F.: 'Impact of screening of latent defects at electrical test on the yield-reliability relation and application to burn-in elimination'. Proc. Int. Reliability Physics Symp., 1998, pp. 370-377
-
(1998)
Proc. Int. Reliability Physics Symp.
, pp. 370-377
-
-
Van Der Pol, J.1
Ooms, E.2
Van 'T Hof, T.3
Kuper, F.4
-
9
-
-
0032639191
-
Microprocessor reliability performance as a function of die location for a 0.25μ, five layer metal CMOS logic process
-
Riordan, W., Miller, R., Sherman, J., and Hicks, J.: 'Microprocessor reliability performance as a function of die location for a 0.25μ, five layer metal CMOS logic process'. Proc. Int. Reliability Physics Symp., 1999, pp. 1-11
-
(1999)
Proc. Int. Reliability Physics Symp.
, pp. 1-11
-
-
Riordan, W.1
Miller, R.2
Sherman, J.3
Hicks, J.4
-
10
-
-
0035680818
-
Unit level predicted yield: A method of identifying high defect density die at wafer sort
-
October
-
Miller, R., and Riordan, W.: 'Unit level predicted yield: a method of identifying high defect density die at wafer sort'. Proc. Int. Test Conf., October 2001, pp. 1118-1127
-
(2001)
Proc. Int. Test Conf.
, pp. 1118-1127
-
-
Miller, R.1
Riordan, W.2
-
11
-
-
0020735104
-
Integrated circuit yield statistics
-
Stapper, C.H., Armstrong, F.M., and Saji, K.: 'Integrated circuit yield statistics', Proc. IEEE, 1983, pp. 453-470
-
(1983)
Proc. IEEE
, pp. 453-470
-
-
Stapper, C.H.1
Armstrong, F.M.2
Saji, K.3
-
12
-
-
0032164444
-
Defect tolerant VLSI circuits: Techniques and yield analysis
-
Koren, I., and Koren, Z.: 'Defect tolerant VLSI circuits: techniques and yield analysis', Proc. IEEE, 1998, 86, pp. 1817-1836
-
(1998)
Proc. IEEE
, vol.86
, pp. 1817-1836
-
-
Koren, I.1
Koren, Z.2
-
13
-
-
0002322314
-
Yield models for defect tolerant VLSI circuits: A review
-
Koren, I., eds ' Plenum
-
Koren, I., and Stapper, C.H.: 'Yield models for defect tolerant VLSI circuits: a review' In: Koren, I., eds, 'Defect and fault tolerance in VLSI systems' (Plenum, 1989) 1, pp. 1-21
-
(1989)
Defect and Fault Tolerance in VLSI Systems
, vol.1
, pp. 1-21
-
-
Koren, I.1
Stapper, C.H.2
-
14
-
-
0036445139
-
Redundancy implications for product reliability: Experimental verification of an integrated yield-reliability model
-
October
-
Barnett, T.S., Singh, A.D., Grady, M., and Purdy, K.G.: 'Redundancy implications for product reliability: experimental verification of an integrated yield-reliability model'. Proc. Int. Test Conf., October 2002
-
(2002)
Proc. Int. Test Conf.
-
-
Barnett, T.S.1
Singh, A.D.2
Grady, M.3
Purdy, K.G.4
|