메뉴 건너뛰기




Volumn , Issue , 2004, Pages 593-595

Useful logic blocks based on clocked series-connected RTDs

Author keywords

MOBILE; Multi thresh old Threshold gate; Nanopipeline; Resonant Tunneling Diodes

Indexed keywords

DIODES; ELECTRIC POTENTIAL; FREQUENCIES; HETEROJUNCTIONS; LOGIC GATES; MATHEMATICAL MODELS; RESONANT TUNNELING;

EID: 20344404746     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (5)

References (11)
  • 1
    • 0034289973 scopus 로고    scopus 로고
    • Threshold logic circuit design of parallel adders using resonant tunnelling devices
    • Oct.
    • C. Pacha et al.: "Threshold Logic Circuit Design of Parallel Adders Using Resonant Tunnelling Devices," IEEE Trans. on VLSI Systems, Vol. 8, no. 5, pp. 558-572, Oct. 2000.
    • (2000) IEEE Trans. on VLSI Systems , vol.8 , Issue.5 , pp. 558-572
    • Pacha, C.1
  • 2
    • 84937999907 scopus 로고
    • Multi-threshold threshold elements
    • February
    • D. R. Haring; "Multi-Threshold Threshold Elements," IEEE Trans. on Electronic Computers, Vol. EC-15, No. 1, pp. 45-65, February 1966.
    • (1966) IEEE Trans. on Electronic Computers , vol.EC-15 , Issue.1 , pp. 45-65
    • Haring, D.R.1
  • 6
    • 0030105078 scopus 로고    scopus 로고
    • InP-based high performance monostable-bistable transition logic elements (MOBILEs) using integrated multiple-input resonant-tunneling devices
    • March
    • K.J. Chen, K. Maezawa and M. Yamamoto: "InP-Based High Performance Monostable-Bistable Transition Logic Elements (MOBILEs) Using Integrated Multiple-Input Resonant-Tunneling Devices," IEEE Electron Device Letters, Vol. 17, no. 3, pp. 127-129, March 1996.
    • (1996) IEEE Electron Device Letters , vol.17 , Issue.3 , pp. 127-129
    • Chen, K.J.1    Maezawa, K.2    Yamamoto, M.3
  • 7
    • 3042558150 scopus 로고    scopus 로고
    • An algorithm for nano-pipelining of circuits and architectures for a nanotechnology
    • P. Gupta, N. K. Jha: "An Algorithm for Nano-pipelining of Circuits and Architectures for a Nanotechnology", Proceedings DATE, pp. 974-979, 2004.
    • (2004) Proceedings DATE , pp. 974-979
    • Gupta, P.1    Jha, N.K.2
  • 8
    • 0030166161 scopus 로고    scopus 로고
    • An exclusive-OR logic circuit based on controlled quenching of series-connected negative differential resistance devices
    • June
    • K.J. Chen, T. Waho, K. Maezawa and M. Yamamoto: "An Exclusive-OR Logic Circuit Based on Controlled Quenching of Series-Connected Negative Differential Resistance Devices," IEEE Electron Device Letters, Vol. 17, no. 6, pp. 309-311, June 1996.
    • (1996) IEEE Electron Device Letters , vol.17 , Issue.6 , pp. 309-311
    • Chen, K.J.1    Waho, T.2    Maezawa, K.3    Yamamoto, M.4
  • 10
    • 0037321217 scopus 로고    scopus 로고
    • Logic synthesis and circuit modellinf of a programmable logic gate based on controlled quenching of series-connected negative differential resistance devices
    • February
    • K.J. Chen and G. Niu, "Logic synthesis and circuit modellinf of a programmable logic gate based on controlled quenching of series-connected negative differential resistance devices," IEEE Journal of Solid State Circuits, Vol. 38, no. 2, pp. 312-318, February 2003.
    • (2003) IEEE Journal of Solid State Circuits , vol.38 , Issue.2 , pp. 312-318
    • Chen, K.J.1    Niu, G.2
  • 11
    • 4344639675 scopus 로고    scopus 로고
    • Programmable logic gate based on resonant tunneling devices
    • to appear
    • J.M. Quintana, M.J. Avedillo and H. Pettenghi: "Programmable Logic Gate based on Resonant Tunneling Devices", ISCAS 2004, to appear, 2004.
    • (2004) ISCAS 2004
    • Quintana, J.M.1    Avedillo, M.J.2    Pettenghi, H.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.