Multi-threshold threshold logic circuit design using resonant tunnelling devices

Electronics Letters

Volumn 39, Issue 21, 2003, Pages 1502-1504

  Avedillo, M J ^a   Quintana, J M ^a   Pettenghi, H ^a   Kelly, P M ^b   Thompson, C J ^b  

^a UNIVERSITY OF SEVILLE   (Spain)

^b UNIVERSITY OF ULSTER   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

FIELD EFFECT TRANSISTORS; HETEROJUNCTIONS; INTEGRATED CIRCUIT LAYOUT; RESONANT TUNNELING; THRESHOLD LOGIC; TUNNEL DIODES;

RESONANT TUNNELING DIODES; THRESHOLD LOGIC CIRCUIT;

LOGIC CIRCUITS;

EID: 0142154399     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:20030989     Document Type: Article

References (6)

1. Pacha, C., et al.: 'Threshold logic circuit design of parallel adders using resonant tunnelling devices', IEEE Trans. VLSI Systems, 2000, 8, (5), pp. 558-572
2. Prost, W.: 28 844, EU IST Report LOCOM, December 2000
3. Haring, D.R.: 'Multi-threshold threshold elements', IEEE Trans. Electron. Comput., 1996, 15, (1), pp. 45-65
4. Chen, K.J., Maezawa K., and Yamamoto, M.: 'InP-based high performance Monostable-Bistable Transition Logic Elements (MOBILEs) using integrated multiple-input resonant-tunneling devices', IEEE Electron Device Lett., 1996, 17, (3), pp. 127-129
5. Avedillo, M.J., Quintana, J.M., and Huertas, J.L.: 'Beyond threshold logic: multi-threshold threshold gates'. 11th MEL-ARI/NID Workshop, Toulouse, France, February 2003
6. Chen, K.J., et al.: 'An exclusive-OR logic circuit based on controlled quenching of series-connected negative differential resistance devices', IEEE Electron Device Lett., 1996, 17, (6), pp. 309-311