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Volumn , Issue , 2005, Pages 215-226

Design, layout and verification of an FPGA using automated tools

Author keywords

Automatic layout; FPGA; PLD; Programmable logic

Indexed keywords

AUTOMATION; COMPUTER AIDED DESIGN; COMPUTER ARCHITECTURE; COMPUTER HARDWARE DESCRIPTION LANGUAGES; LOGIC DESIGN; PROGRAMMABLE LOGIC CONTROLLERS;

EID: 20344391427     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1046192.1046220     Document Type: Conference Paper
Times cited : (43)

References (38)
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.