|
Volumn , Issue , 2000, Pages 175-184
|
Automatic generation of FPGA routing architectures from high-level descriptions
a a |
Author keywords
[No Author keywords available]
|
Indexed keywords
COMPUTER AIDED DESIGN;
COMPUTER ARCHITECTURE;
COMPUTER HARDWARE DESCRIPTION LANGUAGES;
CONGESTION CONTROL (COMMUNICATION);
DATA COMMUNICATION SYSTEMS;
TELECOMMUNICATION TRAFFIC;
ARCHITECTURE GENERATORS;
FIELD PROGRAMMABLE GATE ARRAYS;
|
EID: 0033718654
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1145/329166.329203 Document Type: Conference Paper |
Times cited : (40)
|
References (17)
|