Effect of LUT and cluster size on deep-submicron FPGA performance and density

ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA

Volumn , Issue , 2000, Pages 3-12

  Ahmed, Elias ^a   Rose, Jonathan ^a  

^a UNIVERSITY OF TORONTO   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC NETWORK SYNTHESIS; FLIP FLOP CIRCUITS; FORMAL LOGIC; TABLE LOOKUP;

LOGIC BLOCK ARCHITECTURE;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 0033723235     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/329166.329171     Document Type: Conference Paper

References (24)