-
1
-
-
0000159173
-
Discovery of the tunnel diode
-
L. Esaki, "Discovery of the tunnel diode," IEEE Trans. Electron Devices, vol. ED-23, pp. 644-647, 1976.
-
(1976)
IEEE Trans. Electron Devices
, vol.ED-23
, pp. 644-647
-
-
Esaki, L.1
-
2
-
-
0000284042
-
0.5/Si interband tunneling diodes
-
0.5/Si interband tunneling diodes," Appl. Phys. Lett., vol. 73, pp. 2191-2193, 1998.
-
(1998)
Appl. Phys. Lett.
, vol.73
, pp. 2191-2193
-
-
Rommel, S.L.1
Dillion III, T.E.2
Dashiell, M.W.3
Feng, H.4
Kolodzey, J.5
Berger, P.R.6
Thompson, P.E.7
Hobart, K.D.8
Lake, R.9
Seabaugh, A.C.10
-
3
-
-
0032319705
-
High performance CMOS compatible bistable operation at extremely low supply voltage by a novel Si interband tunneling diode
-
K. Morita, H. Sorada, K. Morimoto, K. Yuki, S. Yoshii, M. Niwa, T. Uenoyama, and K. Ohnaka, "High performance CMOS compatible bistable operation at extremely low supply voltage by a novel Si interband tunneling diode," in Proc. 55th Device Research Conf., 1998, pp. 42-43.
-
(1998)
Proc. 55th Device Research Conf.
, pp. 42-43
-
-
Morita, K.1
Sorada, H.2
Morimoto, K.3
Yuki, K.4
Yoshii, S.5
Niwa, M.6
Uenoyama, T.7
Ohnaka, K.8
-
4
-
-
0033341645
-
Three-terminal silicon surface junction tunneling device for room temperature operation
-
Oct.
-
J. Koga and A. Toriumi, "Three-terminal silicon surface junction tunneling device for room temperature operation," IEEE Electron Device Lett., vol. 20, no. 10, pp. 529-531, Oct. 1999.
-
(1999)
IEEE Electron Device Lett.
, vol.20
, Issue.10
, pp. 529-531
-
-
Koga, J.1
Toriumi, A.2
-
5
-
-
0016072199
-
Resonant tunneling in semiconductor double barriers
-
L. L. Chang, L. Esaki, and R. Tsu, "Resonant tunneling in semiconductor double barriers," Appl. Phys. Lett., vol. 24, pp. 593-595, 1974.
-
(1974)
Appl. Phys. Lett.
, vol.24
, pp. 593-595
-
-
Chang, L.L.1
Esaki, L.2
Tsu, R.3
-
6
-
-
0027549820
-
New functional field-effect transistor based on wavefunction modulation in δ-doped double quantum wells
-
Y. Ohno, M. Tsuchiya, and H. Sakai, "New functional field-effect transistor based on wavefunction modulation in δ-doped double quantum wells," Electron. Lett., vol. 29, pp. 375-376, 1993.
-
(1993)
Electron. Lett.
, vol.29
, pp. 375-376
-
-
Ohno, Y.1
Tsuchiya, M.2
Sakai, H.3
-
7
-
-
0031701561
-
RTD/HFET low standby power SRAM gain cell
-
Jan.
-
J. P. A. van der Wagt, A. C. Seabaugh, and E. A. Beam, III, "RTD/HFET low standby power SRAM gain cell," IEEE Electron Device Lett., vol. 19, no. 1, pp. 7-9, Jan. 1998.
-
(1998)
IEEE Electron Device Lett.
, vol.19
, Issue.1
, pp. 7-9
-
-
Van Der Wagt, J.P.A.1
Seabaugh, A.C.2
Beam III, E.A.3
-
8
-
-
0029545616
-
Novel current-voltage characteristics of an InP-based resonant-tunneling high electron mobility transistor and their circuit applications
-
K. J. Chen, K. Maezawa, and M. Yamamoto, "Novel current-voltage characteristics of an InP-based resonant-tunneling high electron mobility transistor and their circuit applications," in Int. Electron Device Meet. Tech. Dig., 1995, pp. 379-382.
-
(1995)
Int. Electron Device Meet. Tech. Dig.
, pp. 379-382
-
-
Chen, K.J.1
Maezawa, K.2
Yamamoto, M.3
-
9
-
-
0030107120
-
An exclusive-NOR based on resonant interband tunneling FET's
-
Mar.
-
J. Shen, S. Tehrani, H. Goronkin, G. Kramer, and R. Tsui, "An exclusive-NOR based on resonant interband tunneling FET's," IEEE Electron Device Lett., vol. 17, no. 3, pp. 94-96, Mar. 1996.
-
(1996)
IEEE Electron Device Lett.
, vol.17
, Issue.3
, pp. 94-96
-
-
Shen, J.1
Tehrani, S.2
Goronkin, H.3
Kramer, G.4
Tsui, R.5
-
10
-
-
33646900503
-
Device scaling limits of Si MOSFET's and their application dependencies
-
D. J. Frank, R. H. Dennard, E. Nowak, P. M. Solomon, Y. Taur, and H.-S. P. Wong, "Device scaling limits of Si MOSFET's and their application dependencies," Proc. IEEE, vol. 89, pp. 259-288, 2001.
-
(2001)
Proc. IEEE
, vol.89
, pp. 259-288
-
-
Frank, D.J.1
Dennard, R.H.2
Nowak, E.3
Solomon, P.M.4
Taur, Y.5
Wong, H.-S.P.6
-
11
-
-
0035397533
-
An analytical three-terminal band-to-band tunneling model on GIDL in MOSFET
-
Jul.
-
J.-H. Chen, S.-C. Wong, and Y.-H. Wang, "An analytical three-terminal band-to-band tunneling model on GIDL in MOSFET," IEEE Trans. Electron Devices, vol. 48, no. 7, pp. 1400-1405, Jul. 2001.
-
(2001)
IEEE Trans. Electron Devices
, vol.48
, Issue.7
, pp. 1400-1405
-
-
Chen, J.-H.1
Wong, S.-C.2
Wang, Y.-H.3
-
12
-
-
0036805861
-
Negative-differential transconductance characteristics at room temperature in 30-nm square-channel SOI nMOSFET's with a degenerately doped body
-
Oct.
-
K. R. Kim, D. H. Kim, S.-K. Sung, J. D. Lee, and B.-G. Park, "Negative-differential transconductance characteristics at room temperature in 30-nm square-channel SOI nMOSFET's with a degenerately doped body," IEEE Electron Device Lett., vol. 23, no. 10, pp. 612-614, Oct. 2002.
-
(2002)
IEEE Electron Device Lett.
, vol.23
, Issue.10
, pp. 612-614
-
-
Kim, K.R.1
Kim, D.H.2
Sung, S.-K.3
Lee, J.D.4
Park, B.-G.5
-
13
-
-
2942756151
-
Silicon-based field induced band-to-band tunneling effect transistor
-
Jun.
-
K. R. Kim, D. H. Kim, K.-W. Song, G. Baek, H. H. Kim, J. I. Huh, J. D. Lee, and B.-G. Park, "Silicon-based field induced band-to-band tunneling effect transistor," IEEE Electron Device Lett., vol. 25, no. 6, pp. 439-441, Jun. 2004.
-
(2004)
IEEE Electron Device Lett.
, vol.25
, Issue.6
, pp. 439-441
-
-
Kim, K.R.1
Kim, D.H.2
Song, K.-W.3
Baek, G.4
Kim, H.H.5
Huh, J.I.6
Lee, J.D.7
Park, B.-G.8
-
14
-
-
0036539033
-
Silicon single-electron transistors with sidewall depletion gates and their application to dynamic single-electron transistor logic
-
Apr.
-
D. H. Kim, S.-K. Sung, K. R. Kim, J. D. Lee, B.-G. Park, B. H. Choi, S. W. Hwang, and D. Ahn, "Silicon single-electron transistors with sidewall depletion gates and their application to dynamic single-electron transistor logic," IEEE Trans. Electron Devices, vol. 49, no. 4, pp. 627-635, Apr. 2002.
-
(2002)
IEEE Trans. Electron Devices
, vol.49
, Issue.4
, pp. 627-635
-
-
Kim, D.H.1
Sung, S.-K.2
Kim, K.R.3
Lee, J.D.4
Park, B.-G.5
Choi, B.H.6
Hwang, S.W.7
Ahn, D.8
-
15
-
-
20344380095
-
-
"Method of defining a line width," U.S. Patent 5,667,632, Sep. 16
-
R. S. Burton and G. M. Grivina, "Method of defining a line width," U.S. Patent 5,667,632, Sep. 16, 1997.
-
(1997)
-
-
Burton, R.S.1
Grivina, G.M.2
-
16
-
-
0003060791
-
Single-electron transistors based on silicon-on-insulator wire patterned by sidewall masking technology and electrically induced tunnel barriers
-
K. R. Kim, D. H. Kim, J. D. Lee, and B.-G. Park, "Single-electron transistors based on silicon-on-insulator wire patterned by sidewall masking technology and electrically induced tunnel barriers," in Abstracts IEEE Silicon Nanoelectronics Workshop, 2001, pp. 42-43.
-
(2001)
Abstracts IEEE Silicon Nanoelectronics Workshop
, pp. 42-43
-
-
Kim, K.R.1
Kim, D.H.2
Lee, J.D.3
Park, B.-G.4
-
17
-
-
0002053947
-
Three-dimensional siloxane resist for the formation of nanopatterns with minimum linewidth fluctuations
-
H. Namatsu, Y. Takahashi, K. Yamazaki, T. Yamaguchi, M. Nagase, and K. Kurihara, "Three-dimensional siloxane resist for the formation of nanopatterns with minimum linewidth fluctuations," J. Vac. Sci. Technol. B, vol. 16, pp. 69-76, 1998.
-
(1998)
J. Vac. Sci. Technol. B
, vol.16
, pp. 69-76
-
-
Namatsu, H.1
Takahashi, Y.2
Yamazaki, K.3
Yamaguchi, T.4
Nagase, M.5
Kurihara, K.6
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