Three-terminal silicon surface junction tunneling device for room temperature operation

IEEE Electron Device Letters

Volumn 20, Issue 10, 1999, Pages 529-531

  Koga, Junji ^a   Toriumi, Akira ^a  

^a TOSHIBA CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC CONDUCTANCE; IMPURITIES; LEAKAGE CURRENTS; SILICON ON INSULATOR TECHNOLOGY; SILICON WAFERS;

NEGATIVE DIFFERENTIAL CONDUCTANCE; PEAK-TO-VALLEY CURRENT RATIO; THREE-TERMINAL SILICON SURFACE JUNCTION TUNNELING (SJT) DEVICES;

SEMICONDUCTOR JUNCTIONS;

EID: 0033341645     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/55.791932     Document Type: Article

References (8)

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