Breakdowns in high-k gate stacks of nano-scale CMOS devices

Microelectronic Engineering

Volumn 80, Issue SUPPL., 2005, Pages 353-361

  Pey, K L ^a   Ranjan, R ^a   Tung, C H ^b   Tang, L J ^b   Lo, V L ^a   Lim, K S ^a   Selvarajoo, T A L ^a   Ang, D S ^a  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

^b INSTITUTE OF MICROELECTRONICS   (Singapore)

Author keywords

Breakdown; CMOS; Gate dielectrics; High k; MOSFET

Indexed keywords

BREAKDOWN; CMOS; GATE DIELECTRICS; HIGH-K; MOSFET;

CMOS INTEGRATED CIRCUITS; DIELECTRIC MATERIALS; EPITAXIAL GROWTH; FAILURE ANALYSIS; GATES (TRANSISTOR); GRAIN BOUNDARIES; HAFNIUM COMPOUNDS; MICROSTRUCTURE; MOSFET DEVICES; POLYSILICON; SILICA; TRANSCONDUCTANCE;

ELECTRIC BREAKDOWN;

EID: 19944391330     PISSN: 01679317     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.mee.2005.04.091     Document Type: Conference Paper

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