-
1
-
-
0029701451
-
A pipelined digital differential matched-filter FPGA implementation and VLSI design
-
May
-
K. C. Liu, W. C. Lin, and C. K. Wang, "A pipelined digital differential matched-filter FPGA implementation and VLSI design," in Proc. IEEE Custom Integrated Circuits Conf, May 1996, pp. 75-78.
-
(1996)
Proc. IEEE Custom Integrated Circuits Conf
, pp. 75-78
-
-
Liu, K.C.1
Lin, W.C.2
Wang, C.K.3
-
2
-
-
0032285013
-
Low-power design of a 64-tap 4-bit digital matched filter using systolic array architecture and CVSL circuit techniques in CMOS
-
Nov.
-
T. Yalcin and N. Ismailoglu, "Low-power design of a 64-tap 4-bit digital matched filter using systolic array architecture and CVSL circuit techniques in CMOS," in Proc. 32nd Asilomar Conf. Signals, Systems and Computing, vol. 2, Nov. 1998, pp. 1066-1069.
-
(1998)
Proc. 32nd Asilomar Conf. Signals, Systems and Computing
, vol.2
, pp. 1066-1069
-
-
Yalcin, T.1
Ismailoglu, N.2
-
3
-
-
0031257846
-
A 2.6 V, 44-MHz all digital QPSK direct-sequence spread spectrum transceiver IC
-
Oct.
-
J. Wu, M. Liou, H. Ma, and T. Chiueh, "A 2.6 V, 44-MHz all digital QPSK direct-sequence spread spectrum transceiver IC," IEEE J. Solid-State Circuits, vol. 32, no. 10, pp. 1499-1510, Oct. 1997.
-
(1997)
IEEE J. Solid-state Circuits
, vol.32
, Issue.10
, pp. 1499-1510
-
-
Wu, J.1
Liou, M.2
Ma, H.3
Chiueh, T.4
-
4
-
-
0035368242
-
A low-power digital matched filter for direct-sequence spread-spectrum signal acquisition
-
Jun.
-
M. Liou and T. Chiueh, "A low-power digital matched filter for direct-sequence spread-spectrum signal acquisition," IEEE J. Solid-State Circuits, vol. 36, no. 6, pp. 933-943, Jun. 2001.
-
(2001)
IEEE J. Solid-state Circuits
, vol.36
, Issue.6
, pp. 933-943
-
-
Liou, M.1
Chiueh, T.2
-
5
-
-
4544251225
-
Low-power architecture of a digital matched filter for direct-sequence spread-spectrum systems
-
Jan.
-
T. Yamada, S. Goto, N. Takayakma, Y. Matsushita, Y. Ha-rada, and H. Yasuura, "Low-power architecture of a digital matched filter for direct-sequence spread-spectrum systems," IEICE Trans. Electron., vol. E86-C, no. 1, pp. 79-88, Jan. 2003.
-
(2003)
IEICE Trans. Electron.
, vol.E86-C
, Issue.1
, pp. 79-88
-
-
Yamada, T.1
Goto, S.2
Takayakma, N.3
Matsushita, Y.4
Ha-Rada, Y.5
Yasuura, H.6
-
6
-
-
0032291354
-
CCD matched filter in spread spectrum communication
-
Sep.
-
E. Nishimori, C. Kimura, A. Nakagawa, and K. Tsubouchi, "CCD matched filter in spread spectrum communication," in Proc. IEEE Int. Symp. Personal, Indoor and Mobile Radio Communications, vol. 1, Sep. 1998, pp. 396-400.
-
(1998)
Proc. IEEE Int. Symp. Personal, Indoor and Mobile Radio Communications
, vol.1
, pp. 396-400
-
-
Nishimori, E.1
Kimura, C.2
Nakagawa, A.3
Tsubouchi, K.4
-
7
-
-
18744408027
-
An asynchronous spread spectrum wireless-modem using a SAW convolver
-
K. Tsubouchi, T. Tomioka, T. Sato, C. Endo, and N. Mikoshiba, "An asynchronous spread spectrum wireless-modem using a SAW convolver," in Proc. IEEE Ultrasonics Symp., vol. 1, 1998, pp. 459-463.
-
(1998)
Proc. IEEE Ultrasonics Symp.
, vol.1
, pp. 459-463
-
-
Tsubouchi, K.1
Tomioka, T.2
Sato, T.3
Endo, C.4
Mikoshiba, N.5
-
8
-
-
85034632926
-
One chip demodulator using RF front-end SAW correlator for 2.4 GHz asynchronous spread spectrum modem
-
H. Nakase, T. Kasai, Y. Nakamura, K. Masu, and K. Tsubouchi, "One chip demodulator using RF front-end SAW correlator for 2.4 GHz asynchronous spread spectrum modem," in 5th IEEE Symp. Personal, Indoor and Mobile Radio Communications, 1994, pp. 374-378.
-
(1994)
5th IEEE Symp. Personal, Indoor and Mobile Radio Communications
, pp. 374-378
-
-
Nakase, H.1
Kasai, T.2
Nakamura, Y.3
Masu, K.4
Tsubouchi, K.5
-
9
-
-
0031073363
-
Matched filter for DS-CDMA of up to 50Mchip/s based on sampled analog signal processing
-
Feb.
-
T. Shibano, K. lizuka, M. Miyamoto, M. Osaka, R. Miyama, and A. Kito, "Matched filter for DS-CDMA of up to 50Mchip/s based on sampled analog signal processing," in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 1997, pp. 100-101.
-
(1997)
IEEE Int. Solid-state Circuits Conf. Dig. Tech. Papers
, pp. 100-101
-
-
Shibano, T.1
Lizuka, K.2
Miyamoto, M.3
Osaka, M.4
Miyama, R.5
Kito, A.6
-
10
-
-
0034428195
-
A 23-mW 256-tap 8 Msample/s QPSK matched filter for DS-CDMA cellular telephony using recycling integrator correlators
-
Feb.
-
D. Senderowicz, S. Azuma, H. Matsui, K. Hara, S. Kawama, Y. Ohta, M. Miyamoto, and K. lizuka, "A 23-mW 256-tap 8 Msample/s QPSK matched filter for DS-CDMA cellular telephony using recycling integrator correlators," IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, pp. 354-355, Feb. 2000.
-
(2000)
IEEE Int. Solid-state Circuits Conf. Dig. Tech. Papers
, pp. 354-355
-
-
Senderowicz, D.1
Azuma, S.2
Matsui, H.3
Hara, K.4
Kawama, S.5
Ohta, Y.6
Miyamoto, M.7
Lizuka, K.8
-
11
-
-
0142227879
-
A low power matched filter for DS-CDMA based on analog signal processing
-
Apr.
-
M. Sakai, T. Sakai, and T. Matsumoto, "A low power matched filter for DS-CDMA based on analog signal processing," IEICE Trans. Fundamentals, vol. E86-A, no. 4, pp. 752-757, Apr. 2003.
-
(2003)
IEICE Trans. Fundamentals
, vol.E86-A
, Issue.4
, pp. 752-757
-
-
Sakai, M.1
Sakai, T.2
Matsumoto, T.3
-
13
-
-
0036291195
-
Low-power CDMA analog matched filters based on floating-gate technology
-
Arizona, May
-
T. Yamasaki, T. Taguchi, and T. Shibata, "Low-power CDMA analog matched filters based on floating-gate technology," in Proc. IEEE Int. Symp. Circuits and Systems (ISCAS), Arizona, May 2002, pp. V-625-V-628.
-
(2002)
Proc. IEEE Int. Symp. Circuits and Systems (ISCAS)
-
-
Yamasaki, T.1
Taguchi, T.2
Shibata, T.3
-
14
-
-
0141761376
-
A floating-gate-MOS-based low-power CDMA matched filter employing capacitance disconnection technique
-
T. Yamasaki, T. Fukuda, and T. Shibata, "A floating-gate-MOS-based low-power CDMA matched filter employing capacitance disconnection technique," in Symp. VLSI Circuits Dig. Tech. Papers, 2003, pp. 267-270.
-
(2003)
Symp. VLSI Circuits Dig. Tech. Papers
, pp. 267-270
-
-
Yamasaki, T.1
Fukuda, T.2
Shibata, T.3
-
15
-
-
4344670252
-
Quasiparallel multipath detection architecture using floating-gate-MOS- based CDMA matched filters
-
Vancouver, BC, Canada, May
-
T. Nakayama, T. Yamasaki, and T. Shibata, "Quasiparallel multipath detection architecture using floating-gate-MOS-based CDMA matched filters," in Proc. IEEE Int. Symp. Circuits and Systems (ISCAS), Vancouver, BC, Canada, May 2004, pp. I-425-I-428.
-
(2004)
Proc. IEEE Int. Symp. Circuits and Systems (ISCAS)
-
-
Nakayama, T.1
Yamasaki, T.2
Shibata, T.3
-
16
-
-
0034818896
-
Low power current-cut switched-current matched filter for CDMA
-
Feb.
-
K. Togura, H. Nakase, K. Kubota, K. Masu, and K. Tsubouchi, "Low power current-cut switched-current matched filter for CDMA," IEICE Trans. Electron., vol. E84-C, no. 2, pp. 212-219, Feb. 2001.
-
(2001)
IEICE Trans. Electron.
, vol.E84-C
, Issue.2
, pp. 212-219
-
-
Togura, K.1
Nakase, H.2
Kubota, K.3
Masu, K.4
Tsubouchi, K.5
-
17
-
-
27944492851
-
A functional MOS transistor featuring gate-level weighted sum and threshold operations
-
Jun.
-
T. Shitaba and T. Ohmi, "A functional MOS transistor featuring gate-level weighted sum and threshold operations," IEEE Trans. Electron Devices, vol. 39, no. 6, pp. 1444-1455, Jun. 1992.
-
(1992)
IEEE Trans. Electron Devices
, vol.39
, Issue.6
, pp. 1444-1455
-
-
Shitaba, T.1
Ohmi, T.2
-
18
-
-
0001420040
-
Flip-flop selection technique for power-delay tradeoff
-
Feb.
-
M. Hamada, T. Terazawa, T. Higashi, S. Kitabayashi, S. Mita, Y. Watanabe, M. Ashino, H. Hara, and T. Kuroda, "Flip-flop selection technique for power-delay tradeoff," IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, pp. 270-271, Feb. 1999.
-
(1999)
IEEE Int. Solid-state Circuits Conf. Dig. Tech. Papers
, pp. 270-271
-
-
Hamada, M.1
Terazawa, T.2
Higashi, T.3
Kitabayashi, S.4
Mita, S.5
Watanabe, Y.6
Ashino, M.7
Hara, H.8
Kuroda, T.9
-
19
-
-
0027277153
-
Coherent detection with reference-symbol based estimation for direct sequence CDMA uplink communications
-
May
-
P. Ling, "Coherent detection with reference-symbol based estimation for direct sequence CDMA uplink communications," in Proc. Vehicular Technology Conf., May 1993, pp. 400-403.
-
(1993)
Proc. Vehicular Technology Conf.
, pp. 400-403
-
-
Ling, P.1
-
20
-
-
33847744624
-
A low-power switched-current CDMA matched filter employing MOS-linear matching cell and output A/D converter
-
Kobe, Japan, May
-
T. Nakayama, T. Yamasaki, and T. Shibata, "A low-power switched-current CDMA matched filter employing MOS-linear matching cell and output A/D converter," presented at the IEEE Int. Symp. Circuits and Systems (ISCAS), Kobe, Japan, May 2005.
-
(2005)
IEEE Int. Symp. Circuits and Systems (ISCAS)
-
-
Nakayama, T.1
Yamasaki, T.2
Shibata, T.3
|