A low-power switched-current CDMA matched filter employing MOS-linear matching cell and output a/d converter

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2005, Pages 5365-5368

  Nakayama, Tomoyuki ^a   Yamasaki, Toshihiko ^a   Shibata, Tadashi ^a  

^a UNIVERSITY OF TOKYO   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

A/D CONVERTER; BACK-END PROCESSING; CMOS TECHNOLOGY; IV CHARACTERISTICS; LINEAR MATCHING; LOW POWER; LOW-POWER OPERATION; MATCHED FILTERS; POWER SUPPLY; PROTOTYPE CHIP; SWITCHED CURRENTS; V/I CONVERTER;

CMOS INTEGRATED CIRCUITS;

CODE DIVISION MULTIPLE ACCESS;

EID: 33847744624     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2005.1465848     Document Type: Conference Paper

References (7)

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6. T. Yamasaki, T. Nakayama, and T. Shibata, "A Low-Power Switched-Current CDMA Matched Filter with On-Chip V-I and I-V Converters," VLSI Circuits Dig. Tech. Papers, pp. 214-217, Jun. 2004.
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