-
1
-
-
0031257846
-
A 2.6V, 44-MHz all digital QPSK direct-sequence spread spectrum transceiver IC
-
Oct.
-
J. Wu, M. Liou, H. Ma and T. Chiueh, "A 2.6V, 44-MHz all digital QPSK direct-sequence spread spectrum transceiver IC," IEEE JSSC, vol. 32, pp. 1499-1510, Oct. 1997.
-
(1997)
IEEE JSSC
, vol.32
, pp. 1499-1510
-
-
Wu, J.1
Liou, M.2
Ma, H.3
Chiueh, T.4
-
2
-
-
0032291354
-
CCD matched filter in spread spectrum communication
-
Boston, Sep.
-
E. Nishimori, C. Kimura, A. Nakagawa, and K. Tsubouchi, "CCD matched filter in spread spectrum communication," Proc. IEEE Int. Symp. on Personal, Indoor and Mobile Radio Communications, Vol. 1, Boston, pp. 396-400, Sep., 1998.
-
(1998)
Proc. IEEE Int. Symp. on Personal, Indoor and Mobile Radio Communications
, vol.1
, pp. 396-400
-
-
Nishimori, E.1
Kimura, C.2
Nakagawa, A.3
Tsubouchi, K.4
-
3
-
-
4243378666
-
SS demodulator using SAW device for wireless LAN applications
-
Y. Takeuchi, H. Taguma, M. Nara and A.Tago, "SS demodulator using SAW device for wireless LAN applications," IEICE Technical Report, CS94-50, pp.7-12, 1994.
-
(1994)
IEICE Technical Report
, vol.CS94-50
, pp. 7-12
-
-
Takeuchi, Y.1
Taguma, H.2
Nara, M.3
Tago, A.4
-
4
-
-
0031073363
-
Matched filter for DS-CDMA of up to 50Mchip/s based on sampled analog signal processing
-
Dig. Tech. Papers, Feb.
-
T. Shibano, K. lizuka, M. Miyamoto, M. Osaka, R. Miyama and A.Kito, "Matched filter for DS-CDMA of up to 50Mchip/s based on sampled analog signal processing," IEEE International Solid-State Circuits Conf., Dig. Tech. Papers, pp. 100-101, Feb., 1997.
-
(1997)
IEEE International Solid-State Circuits Conf.
, pp. 100-101
-
-
Shibano, T.1
Lizuka, K.2
Miyamoto, M.3
Osaka, M.4
Miyama, R.5
Kito, A.6
-
5
-
-
0034428195
-
A 23-mW 256-Tap 8 Msample/s QPSK Matched Filter for DS-CDMA Cellular Telephony Using Recycling Integrator Correlators
-
Dig. Tech. Papers, Feb.
-
D. Senderowicz, S. Azuma, H, Matsui, K. Hara, S. Kawama, Y. Ohta, M. Miyamoto, and K. lizuka, "A 23-mW 256-Tap 8Msample/s QPSK Matched Filter for DS-CDMA Cellular Telephony Using Recycling Integrator Correlators," IEEE International Solid-State Circuits Conf., Dig. Tech. Papers, pp.354-355, Feb., 2000.
-
(2000)
IEEE International Solid-State Circuits Conf.
, pp. 354-355
-
-
Senderowicz, D.1
Azuma, S.2
Matsui, H.3
Hara, K.4
Kawama, S.5
Ohta, Y.6
Miyamoto, M.7
Lizuka, K.8
-
6
-
-
0032654109
-
Neuron-MOS parallel associator for high-speed CDMA matched filter
-
A. Okada and T. Shibata, "Neuron-MOS parallel associator for high-speed CDMA matched filter," Proc. 1999 IEEE Int. Symp. on Cir. and Syst., vol. 2, pp.H-392 - II-395, 1999
-
(1999)
Proc. 1999 IEEE Int. Symp. on Cir. and Syst.
, vol.2
-
-
Okada, A.1
Shibata, T.2
-
7
-
-
0036291195
-
Low-Power CDMA Analog Matched Filters Based on Floating-Gate Technology
-
May
-
T. Yamasaki, T. Taguchi, and T. Shibata, "Low-Power CDMA Analog Matched Filters Based on Floating-Gate Technology," Proc. of The 2002 IEEE Int. Symp. on Cir. and Syst., pp.V-625-628, May, 2002.
-
(2002)
Proc. of The 2002 IEEE Int. Symp. on Cir. and Syst.
-
-
Yamasaki, T.1
Taguchi, T.2
Shibata, T.3
-
8
-
-
27944492851
-
A Functional MOS Transistor Featuring Gate-Level Weighted Sum and Threshold Operations
-
T. Shitaba and T. Ohmi, "A Functional MOS Transistor Featuring Gate-Level Weighted Sum and Threshold Operations," IEEE Trans. ED, vol. 39, No. 6, pp.1444-1455, 1992.
-
(1992)
IEEE Trans. ED
, vol.39
, Issue.6
, pp. 1444-1455
-
-
Shitaba, T.1
Ohmi, T.2
-
9
-
-
0009556841
-
Fast Parallel Spatial Filters using Floating-Gate Transistor Array
-
C-580, March [In Japanese]
-
T. Sakai and T. Matsumoto, "Fast Parallel Spatial Filters using Floating-Gate Transistor Array," Proc. of the 1996 IEICE General Conf., C-580, Vol. C-2, pp. 196, March, 1996 [In Japanese].
-
(1996)
Proc. of the 1996 IEICE General Conf.
, vol.C-2
, pp. 196
-
-
Sakai, T.1
Matsumoto, T.2
|