-
1
-
-
0032314038
-
Scan chain design for test time reduction in core-based ics
-
October
-
J. Aerts and E. J. Marinissen. Scan Chain Design for Test Time Reduction in Core-Based ICs. In Proc. of International Test Conference, pages 448-457, October 1998.
-
(1998)
Proc. of International Test Conference
, pp. 448-457
-
-
Aerts, J.1
Marinissen, E.J.2
-
2
-
-
84893639045
-
On the role of independent fault sets in the generation of minimal test sets
-
October
-
S. B. Akers. On the Role of Independent Fault Sets in the Generation of Minimal Test Sets. In Proc. of International Test Conference, pages 465-472, October 1987.
-
(1987)
Proc. of International Test Conference
, pp. 465-472
-
-
Akers, S.B.1
-
3
-
-
0029406001
-
Test set compaction for combinational circuits
-
November
-
J. S. Chang and C. S. Lin. Test Set Compaction for Combinational Circuits. IEEE Trans. on Computer- Aided Design, pages 1370-1378, November 1995.
-
(1995)
IEEE Trans. on Computer- Aided Design
, pp. 1370-1378
-
-
Chang, J.S.1
Lin, C.S.2
-
4
-
-
0032320384
-
Test set compaction algorithms for combinational circuits
-
November
-
I. Hamzaoglu and J. H. Patel. Test Set Compaction Algorithms for Combinational Circuits. In Proc. of Int. Conf. on CAD, pages 283-289, November 1998.
-
(1998)
Proc. of Int. Conf. on CAD
, pp. 283-289
-
-
Hamzaoglu, I.1
Patel, J.H.2
-
5
-
-
0027150951
-
Cost eective generation of minimal test sets for stuck at faults in combinational logic circuits
-
June
-
S. Kajihara, I. Pomeranz, K. Kinoshita, and M. Reddy. Cost Eective Generation of Minimal Test Sets for Stuck at Faults in Combinational Logic Circuits. In Proc. of the Design Automation Conf., pages 102-106, June 1998.
-
(1998)
Proc. of the Design Automation Conf.
, pp. 102-106
-
-
Kajihara, S.1
Pomeranz, I.2
Kinoshita, K.3
Reddy, M.4
-
6
-
-
0016535251
-
The weighted random test-pattern generator
-
July
-
H. D. Schnurmann, E. Lindbloom, and R. F. Carpenter. The Weighted Random Test-Pattern Generator. IEEE Trans. on Computers, C-24, No. 7:695-700, July 1975.
-
(1975)
IEEE Trans. on Computers
, vol.C-24
, Issue.7
, pp. 695-700
-
-
Schnurmann, H.D.1
Lindbloom, E.2
Carpenter, R.F.3
-
7
-
-
0032307115
-
A novel test methodology for core-based system lsis and a testing time minimization problem
-
October
-
M. Sugihara, H. Date, and H. Yasuura. A Novel Test Methodology for Core-Based System LSIs and a Testing Time Minimization Problem. In Proc. of International Test Conference, pages 465-472, October 1998.
-
(1998)
Proc. of International Test Conference
, pp. 465-472
-
-
Sugihara, M.1
Date, H.2
Yasuura, H.3
-
8
-
-
0032305822
-
A test method- ology for core-based system lsis
-
December
-
M. Sugihara, H. Date, and H. Yasuura. A test method- ology for core-based system lsis. IEICE Trans. Funda- mentals, E81-A(12):2640-2645, December 1998.
-
(1998)
IEICE Trans. Funda- Mentals
, vol.E81-A
, Issue.12
, pp. 2640-2645
-
-
Sugihara, M.1
Date, H.2
Yasuura, H.3
|