On the scaling of thermal stresses in passivated nanolnterconnects

Journal of Applied Physics

Volumn 95, Issue 5, 2004, Pages 2763-2769

  Sharma, P ^a   Ganti, S ^b   Ardebili, H ^b   Alizadeh, A ^b  

^a UNIVERSITY OF HOUSTON   (United States)

^b GE GLOBAL RESEARCH   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

MOORE'S LAW; NANOINTERCONNECTS;

ELECTROMIGRATION; FABRICATION; FAILURE (MECHANICAL); MATHEMATICAL MODELS; MICROPROCESSOR CHIPS; NANOSTRUCTURED MATERIALS; NANOTECHNOLOGY; THERMAL STRESS;

OPTICAL INTERCONNECTS;

EID: 1642330685     PISSN: 00218979     EISSN: None     Source Type: Journal    
DOI: 10.1063/1.1632011     Document Type: Article

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