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Volumn 49, Issue 5, 2005, Pages 708-715

On the great potential of non-doped MOSFETs for analog applications in partially-depleted SOI CMOS process

Author keywords

Analog applications; Floating body effects; Non doped devices; SOI MOSFETs

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; DIFFUSION; DOPING (ADDITIVES); GATES (TRANSISTOR); IMPACT IONIZATION; SILICON ON INSULATOR TECHNOLOGY; THRESHOLD VOLTAGE; TRANSCONDUCTANCE; VOLTAGE CONTROL;

EID: 14844320546     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sse.2004.09.004     Document Type: Conference Paper
Times cited : (18)

References (14)
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    • 203rd ECS Meeting. The Electrochemical Society
    • Levacq D, Dehan M, Flandre D, Raskin J-P. Figures-of-Merit of Intrinsic, Standard-Doped and Graded-Channel SOI and SOS MOSFETs for Analog Baseband and RF Applications. In: Proceedings of the 11th International Symposium on SOI Technology and Devices, 203rd ECS Meeting. The Electrochemical Society, PV 2003-5, 2003. p. 295-300
    • (2003) Proceedings of the 11th International Symposium on SOI Technology and Devices , vol.PV 2003-5 , pp. 295-300
    • Levacq, D.1    Dehan, M.2    Flandre, D.3    Raskin, J.-P.4
  • 4
    • 0004044166 scopus 로고    scopus 로고
    • Silvaco International
    • ATLAS Manual. Silvaco International; 1999
    • (1999) ATLAS Manual
  • 5
    • 0023422261 scopus 로고
    • Modeling of transconductance degradation and extraction of threshold voltage in thin oxide MOSFET's
    • H.-S. Wong, M.H. White, T.J. Krutsick, and R.V. Booth Modeling of transconductance degradation and extraction of threshold voltage in thin oxide MOSFET's Solid-State Electron 30 1987 953 968
    • (1987) Solid-State Electron , vol.30 , pp. 953-968
    • Wong, H.-S.1    White, M.H.2    Krutsick, T.J.3    Booth, R.V.4
  • 7
    • 0030127650 scopus 로고    scopus 로고
    • Modeling and application of fully-depleted SOI MOSFETs for low-voltage low-power analog CMOS circuits
    • D. Flandre, L. Ferreira, P.G.A. Jespers, and J.-P. Colinge Modeling and application of fully-depleted SOI MOSFETs for low-voltage low-power analog CMOS circuits Solid-State Electron 39 1996 455 460
    • (1996) Solid-State Electron , vol.39 , pp. 455-460
    • Flandre, D.1    Ferreira, L.2    Jespers, P.G.A.3    Colinge, J.-P.4
  • 9
    • 1342265608 scopus 로고    scopus 로고
    • AC behavior of gate-induced floating body effects in ultra-thin oxide PD SOI MOSFETs
    • D. Lederer, D. Flandre, and J.-P. Raskin AC behavior of gate-induced floating body effects in ultra-thin oxide PD SOI MOSFETs IEEE Electron Dev Lett 25 2004 104 106
    • (2004) IEEE Electron Dev Lett , vol.25 , pp. 104-106
    • Lederer, D.1    Flandre, D.2    Raskin, J.-P.3
  • 13
    • 0033325117 scopus 로고    scopus 로고
    • Device issues in the integration of analog/RF functions in deep submicron digital CMOS
    • Technical Digest
    • Buss D. Device issues in the integration of analog/RF functions in deep submicron digital CMOS. In: 1999 International Electron Devices Meeting (IEDM). Technical Digest, 1999. p. 423-6
    • (1999) 1999 International Electron Devices Meeting (IEDM) , pp. 423-426
    • Buss, D.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.