Thermally robust TaTbxN metal gate electrode for n-MOSFETs applications

IEEE Electron Device Letters

Volumn 26, Issue 2, 2005, Pages 75-77

  Ren, C ^a   Yu, H Y ^a   Wang, X P ^a   Ma, H H H ^a   Chan, Daniel S H ^a   Li, M F ^a,b   Yeo, Yee Chia ^a   Tung, C H ^b   Balasubramanian, N ^b   Huan, A C H ^c   Pan, J S ^c   Kwong, D L ^d  

^a NATIONAL UNIVERSITY OF SINGAPORE   (Singapore)

^b INSTITUTE OF MICROELECTRONICS   (Singapore)

^c INSTITUTE OF MATERIALS RESEARCH AND ENGINEERING   (Singapore)

^d UNIVERSITY OF TEXAS AT AUSTIN   (United States)

Author keywords

CMOS; Dual metal gate; N type; TaTbxN; Thermal stability

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC BREAKDOWN; ELECTRODES; LEAKAGE CURRENTS; RAPID THERMAL ANNEALING; TANTALUM COMPOUNDS; TERBIUM; THERMODYNAMIC STABILITY;

DUAL METAL GATE; EQUIVALENT OXIDE THICKNESS; METAL GATE ELECTRODES; TIME DEPENDENT DIELECTRIC BREAKDOWN (TDDB);

MOSFET DEVICES;

EID: 13444279052     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2004.841469     Document Type: Article

References (8)

1. x MOSFETs using conventional CMOS process flow," in VLSI Symp. Tech. Dig., 2004, pp. 186-187.
2. 2 gate stack for advanced CMOS devices," in IEDM Tech. Dig., 2003, pp. 99-103.
3. J. Westlinder, T. Schram, L. Pantisano, E. Cartier, A. Kerber, G. S. Lujan, J. Olsson, and G. Groeseneken, "On the thermal stability of atomic layer deposited TiN as gate electrode in MOS devices," IEEE Electron Device Lett., vol. 24, no. 6, pp. 550-552, Jun. 2003.
4. 2 gate stack," IEEE Electron Device Lett., vol. 25, no. 3, pp. 123-125, Mar. 2004.
5. y gate electrodes for dual gate Si-CMOS devices," in VLSI Symp. Tech. Dig., 2001, pp. 47-48.
6. 2 gate dielectrics," J. Vac. Sci. Technol. B, Microelectron. Process. Phenom., vol. 21, no. 1, pp. 11-17, Jan. /Feb. 2003.
7. 2," J. Electrochem. Soc., vol. 150, pp. 79-82, 2003.
8. y metal gate electrodes," IEEE Electron Device Lett., vol. 24, no. 7, pp. 439-441, Jul. 2003.