Thermally Robust High Quality HfN/HfO 2 Gate Stack for Advanced CMOS Devices

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 2003, Pages 99-102

  Yu, H Y ^a   Kang, J F ^a,c   Chen, J D ^a   Ren, C ^a   Hou, Y T ^a   Whang, S J ^a,d   Li, M F ^a,b   Chan, D S H ^a   Bera, K L ^b   Tung, C H ^b   Du, A ^b   Kwong, D L ^e  

^a NATIONAL UNIVERSITY OF SINGAPORE   (Singapore)

^b INSTITUTE OF MICROELECTRONICS   (Singapore)

^c PEKING UNIVERSITY   (China)

^d Jusung Engineering Company Limited   (South Korea)

^e The University of Texas at Austin   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

GATE STACKS; POST DEPOSITION ANNEALING (PDA);

CARRIER MOBILITY; COMPUTER SIMULATION; DIELECTRIC MATERIALS; HAFNIUM COMPOUNDS; METALLORGANIC CHEMICAL VAPOR DEPOSITION; MOSFET DEVICES; PHYSICAL VAPOR DEPOSITION; QUANTUM THEORY; RAPID THERMAL ANNEALING; TRANSMISSION ELECTRON MICROSCOPY;

CMOS INTEGRATED CIRCUITS;

EID: 17644440782     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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