A single-electron-transistor logic gate family for binary, multiple-valued and mixed-mode logic

IEICE Transactions on Electronics

Volumn E87-C, Issue 11, 2004, Pages 1827-1836

  Degawa, Katsuhiko ^a   Aoki, Takafumi ^a   Higuchi, Tatsuo ^b   Inokawa, Hiroshi ^c   Takahashi, Yasuo ^d  

^a TOHOKU UNIVERSITY   (Japan)

^b TOHOKU INSTITUTE OF TECHNOLOGY   (Japan)

^c NTT Basic Research Laboratories   (Japan)

^d HOKKAIDO UNIVERSITY   (Japan)

Author keywords

Logic circuits; Multiple valued logic; Parallel counters; Quantum devices; Single electron transistors

Indexed keywords

ELECTRONS; LOGIC CIRCUITS; LOGIC DEVICES; MATHEMATICAL MODELS; MATHEMATICAL OPERATORS; MOS DEVICES; MOSFET DEVICES;

MIXED-MODE LOGIC; MULTIPLE-VALUED LOGIC; PARALLEL COUNTERS; QUANTUM DEVICES; SINGLE-ELECTRON TRANSISTORS;

GATES (TRANSISTOR);

EID: 10444246510     PISSN: 09168524     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

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