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Volumn 517, Issue 1-3, 2004, Pages 313-336

Temperature characterization of deep and shallow defect centers of low noise silicon JFETs

Author keywords

Cryogenic electronics; JFET; Low noise transistors; Low temperature operation; Noise

Indexed keywords

BOLOMETERS; CAPACITANCE; CRYOGENICS; LOW TEMPERATURE EFFECTS; SEMICONDUCTING SILICON; SEMICONDUCTOR DOPING; SPURIOUS SIGNAL NOISE;

EID: 0348229181     PISSN: 01689002     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.nima.2003.09.034     Document Type: Article
Times cited : (18)

References (61)
  • 26
    • 0004278609 scopus 로고
    • Cambridge University Press, Cambridge
    • R.A. Smith, Semiconductors, 2nd Edition, Cambridge University Press, Cambridge, 1978, pp. 282-283.
    • (1978) Semiconductors, 2nd Edition , pp. 282-283
    • Smith, R.A.1
  • 35
    • 0346255344 scopus 로고    scopus 로고
    • SKUDOTECH® is a Registered trademark by SELITE, Via Aurelio Saffi 29, 20123 Milano, IT.
    • SKUDOTECH® is a Registered trademark by SELITE, Via Aurelio Saffi 29, 20123 Milano, IT.
  • 55
    • 0004060329 scopus 로고    scopus 로고
    • Prentice-Hall, Englewood Cliffs, NJ
    • A. Van Der Ziel, Fisica dei dispositivi elettronici a stato solido, III Edizione, Liguori Editore, 1979, pp. 554-556 (translation from Solid State Physical Electronics, Prentice-Hall, Englewood Cliffs, NJ).
    • Solid State Physical Electronics
  • 61


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.