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Volumn 24, Issue 12, 2003, Pages 742-744

Potential Vulnerability of Dynamic CMOS Logic to Soft Gate Oxide Breakdown

Author keywords

Circuit reliability; Dielectric breakdown; MOSFET logic devices

Indexed keywords

DIELECTRIC MATERIALS; ELECTRIC BREAKDOWN; ELECTRIC POTENTIAL; LEAKAGE CURRENTS; LOGIC CIRCUITS; LOGIC GATES; MOSFET DEVICES;

EID: 0347131290     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2003.819912     Document Type: Article
Times cited : (17)

References (15)
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    • R. Rodriguez et al., "A model for gate-oxide breakdown in CMOS inverters," in IEEE Electron Device Lett., vol. 24, Feb. 2003, pp. 114-116.
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.