Semi-dynamic and dynamic flip-flops with embedded logic

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 1998, Pages 108-109

  Klass, Fabian ^a  

^a SUN MICROSYSTEMS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; LOGIC DESIGN; TRIGGER CIRCUITS;

MINIMUM DELAY PENALTY;

FLIP FLOP CIRCUITS;

EID: 0031640603     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)