Power- and Complexity-Aware Issue Queue Designs

IEEE Micro

Volumn 23, Issue 5, 2003, Pages 50-58

  Abella, Jaume ^a   Canal, Ramon ^a   González, Antonio ^a  

^a UNIVERSITAT POLITÈCNICA DE CATALUNYA   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

ASSOCIATIVE STORAGE; ENERGY UTILIZATION; LOGIC DESIGN; RANDOM ACCESS STORAGE; SHIFT REGISTERS;

OPERANDS; PARALLELISM;

MICROPROCESSOR CHIPS;

EID: 0242662056     PISSN: 02721732     EISSN: None     Source Type: Journal    
DOI: 10.1109/MM.2003.1240212     Document Type: Article

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