An implicit path-delay fault diagnosis methodology

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 22, Issue 10, 2003, Pages 1399-1408

  Padmanaban, Saravanan ^a   Tragoudas, Spyros ^b  

^a UNIVERSITY OF MARYLAND BALTIMORE COUNTY   (United States)

^b Southern Illinois University Carbondale   (United States)

Author keywords

Delay testing; Diagnosis; Path delay faults (PDFs)

Indexed keywords

DATA STRUCTURES; DECISION TABLES; DELAY CIRCUITS; DIGITAL INTEGRATED CIRCUITS; FAILURE ANALYSIS; MATHEMATICAL MODELS; VECTORS; WAVEFORM ANALYSIS;

BINARY DECISION DIAGRAMS; PATH DELAY FAULTS;

INTEGRATED CIRCUIT TESTING;

EID: 0142054803     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2003.818132     Document Type: Article

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