Low-power single-bit full adder cells

Canadian Journal of Electrical and Computer Engineering

Volumn 28, Issue 1, 2003, Pages 3-9

  Shoarinejad, Arash ^a   Ung, Sue Ann ^a   Badawy, Wael ^a  

^a UNIVERSITY OF CALGARY   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

CHARGING CAPABILITY PARAMETER; LOW POWER FULL ADDER; SINGLE BIT FULL ADDER;

CMOS INTEGRATED CIRCUITS; DELAY CIRCUITS; ELECTRIC NETWORK PARAMETERS; LOGIC CIRCUITS; LOGIC DESIGN; MICROELECTRONICS; POWER ELECTRONICS;

ADDERS;

EID: 0041439831     PISSN: 08408688     EISSN: None     Source Type: Journal    
DOI: 10.1109/CJECE.2003.1426068     Document Type: Article

References (20)

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