Power consumption and performance of low-voltage bit-serial adders

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 4, Issue , 1996, Pages 45-48

  Njolstad, Tormod ^a   Aas, Einar J ^a  

^a NORWEGIAN UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Norway)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMBINATORIAL CIRCUITS; COMPUTER SIMULATION; FLIP FLOP CIRCUITS; LOGIC CIRCUITS; LOGIC DESIGN; LOGIC GATES; MATHEMATICAL MODELS; MOSFET DEVICES; OPTIMIZATION; PERFORMANCE; TRIGGER CIRCUITS;

BIT SERIAL ADDER; FULL ADDER; POWER CONSUMPTION; SWING RESTORED PASS TRANSISTOR LOGIC;

ADDERS;

EID: 0029708290     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (17)