-
1
-
-
0037972369
-
Inductance calculation in interconnect structures
-
San Diego, CA, USA
-
Harlander C., Sabelka R., Selberherr S. Inductance calculation in interconnect structures, Proceedings of the Third International Conference on Modeling and Simulation of Microsystems, San Diego, CA, USA, 2000, pp. 416-419.
-
(2000)
Proceedings of the Third International Conference on Modeling and Simulation of Microsystems
, pp. 416-419
-
-
Harlander, C.1
Sabelka, R.2
Selberherr, S.3
-
2
-
-
0031246188
-
When are transmission-line effects important for on-chip interconnections?
-
Deutsch A., Kopcsay G.V., Restle P.J., Smith H.H., Katopis G., Becker W.D., Coteus P.W., Surovic C.W., Rubin B.J., Gallo J.D.R.P.T., Jenkins K.A., Terman L.M., Dennard R.H., Sai-Halasz G.A., Krauter B.L., Knebel D.R. When are transmission-line effects important for on-chip interconnections? IEEE Transactions on Microwave Theory and Techniques. 45:(10):1997;1836-1846.
-
(1997)
IEEE Transactions on Microwave Theory and Techniques
, vol.45
, Issue.10
, pp. 1836-1846
-
-
Deutsch, A.1
Kopcsay, G.V.2
Restle, P.J.3
Smith, H.H.4
Katopis, G.5
Becker, W.D.6
Coteus, P.W.7
Surovic, C.W.8
Rubin, B.J.9
Gallo, J.D.R.P.T.10
Jenkins, K.A.11
Terman, L.M.12
Dennard, R.H.13
Sai-Halasz, G.A.14
Krauter, B.L.15
Knebel, D.R.16
-
4
-
-
0035215162
-
Hybrid structured clock network construction
-
San Jose, USA
-
Su H., Sapatnekar S. Hybrid structured clock network construction, Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, San Jose, USA, 2001, pp. 333-336.
-
(2001)
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design
, pp. 333-336
-
-
Su, H.1
Sapatnekar, S.2
-
5
-
-
0031988278
-
Topography simulation for interconnect deposition
-
Rey J., Li J., Boksha V., Adalsteinsson D., Sethian J. Topography simulation for interconnect deposition. Solid State Technology. 2:1998;77-82.
-
(1998)
Solid State Technology
, vol.2
, pp. 77-82
-
-
Rey, J.1
Li, J.2
Boksha, V.3
Adalsteinsson, D.4
Sethian, J.5
-
7
-
-
0034841272
-
A practical methodology for early buffer and wire resource allocation
-
Las Vegas, USA
-
Alpert C.J., Hu J., Sapatnekar S.S., Villarrubia P.G. A practical methodology for early buffer and wire resource allocation, Proceedings of the Design Automation Conference'01, 38th Design Automation Conference, Las Vegas, USA, 2001, pp. 189-193.
-
(2001)
Proceedings of the Design Automation Conference'01, 38th Design Automation Conference
, pp. 189-193
-
-
Alpert, C.J.1
Hu, J.2
Sapatnekar, S.S.3
Villarrubia, P.G.4
-
8
-
-
0031623454
-
Layout techniques for minimizing on-chip interconnect self inductance
-
ACM, San Francisco, USA
-
Massoud Y., Majors S., Bustami T., White J. Layout techniques for minimizing on-chip interconnect self inductance, Proceedings of the Design Automation Conference'98, ACM, San Francisco, USA, 1998, pp. 566-571.
-
(1998)
Proceedings of the Design Automation Conference'98
, pp. 566-571
-
-
Massoud, Y.1
Majors, S.2
Bustami, T.3
White, J.4
-
9
-
-
0035212465
-
Formulae abd applications of interconnect estimation considering shield insertion and net ordering
-
San Jose, USA
-
Ma J.D.Z., He L. Formulae abd applications of interconnect estimation considering shield insertion and net ordering, Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, San Jose, USA, 2001, pp. 327-332.
-
(2001)
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design
, pp. 327-332
-
-
Ma, J.D.Z.1
He, L.2
-
10
-
-
0001691745
-
The self and mutual inductances of linear conductors
-
Rosa E.B. The self and mutual inductances of linear conductors. Bulletin of the Bureau of Standards. 4:(2):1907;301-344.
-
(1907)
Bulletin of the Bureau of Standards
, vol.4
, Issue.2
, pp. 301-344
-
-
Rosa, E.B.1
-
11
-
-
0001038774
-
Exact inductance equations for rectangular conductors with applications to more complicated geometries
-
Hoer C., Love C. Exact inductance equations for rectangular conductors with applications to more complicated geometries. Journal of Research of the National Bureau of Standards. 69C:(2):1965;127-137.
-
(1965)
Journal of Research of the National Bureau of Standards
, vol.69 C
, Issue.2
, pp. 127-137
-
-
Hoer, C.1
Love, C.2
-
12
-
-
0001032562
-
Inductance calculations in a complex integrated circuit environment
-
Ruehli A.E. Inductance calculations in a complex integrated circuit environment. IBM Journal of Research and Development. 16:(5):1972;470-481.
-
(1972)
IBM Journal of Research and Development
, vol.16
, Issue.5
, pp. 470-481
-
-
Ruehli, A.E.1
-
13
-
-
0018545259
-
Resistive and inductive skin effect in rectangular conductors
-
Weeks W.T., Wu L.L., McAllister M.F., Singh A. Resistive and inductive skin effect in rectangular conductors. IBM Journal of Research and Development. 23:(6):1979;652-660.
-
(1979)
IBM Journal of Research and Development
, vol.23
, Issue.6
, pp. 652-660
-
-
Weeks, W.T.1
Wu, L.L.2
McAllister, M.F.3
Singh, A.4
-
17
-
-
0035254362
-
A finite element simulator for three-dimensional analysis of interconnect structures
-
Sabelka R., Selberherr S. A finite element simulator for three-dimensional analysis of interconnect structures. Microelectronics Journal. 32:(2):2001;163-171.
-
(2001)
Microelectronics Journal
, vol.32
, Issue.2
, pp. 163-171
-
-
Sabelka, R.1
Selberherr, S.2
-
19
-
-
0037972352
-
Modeling integrated circuit interconnections
-
Curitiba, Brazil
-
Martins R., Pyka W., Sabelka R., Selberherr S. Modeling integrated circuit interconnections, Proceedings of the International Conference on Microelectronics and Packaging, Curitiba, Brazil, 1998, pp. 144-151.
-
(1998)
Proceedings of the International Conference on Microelectronics and Packaging
, pp. 144-151
-
-
Martins, R.1
Pyka, W.2
Sabelka, R.3
Selberherr, S.4
-
20
-
-
0006476889
-
Layout data in TCAD frameworks
-
Society for Computer Simulation International
-
Martins R., Selberherr S. Layout data in TCAD frameworks, Modelling and Simulation, Society for Computer Simulation International, 1996.
-
(1996)
Modelling and Simulation
-
-
Martins, R.1
Selberherr, S.2
-
22
-
-
0006490445
-
Preconditioned CG-solvers and finite element grids
-
Breckenridge, USA
-
Bauer R., Selberherr S. Preconditioned CG-solvers and finite element grids, Proceedings of the CCIM, Breckenridge, USA, vol. 2:1994.
-
(1994)
Proceedings of the CCIM
, vol.2
-
-
Bauer, R.1
Selberherr, S.2
-
25
-
-
0038648652
-
Acceleration of inductance extraction by means of the Monte Carlo method
-
Integrated Systems Laboratory, ETH Zürich
-
G. Leonhardt, W. Fichtner, Acceleration of inductance extraction by means of the Monte Carlo method, Technical Report 99/8, Integrated Systems Laboratory, ETH Zürich, 1999.
-
(1999)
Technical Report 99/8
-
-
Leonhardt, G.1
Fichtner, W.2
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