Mesh generation for application in technology CAD

IEICE Transactions on Electronics

Volumn E82-C, Issue 6, 1999, Pages 937-947

  Fleischmann, Peter ^a   Pyka, Wolfgang ^a   Selberherr, Siegfried ^a  

^a VIENNA UNIVERSITY OF TECHNOLOGY   (Austria)

Author keywords

Advancing front; Boundary conforming mesh; Conforming Delaunay triangulation; Constrained Delaunay triangulation; Quality mesh generation; Sch nhardt polyhedron; Steiner point

Indexed keywords

ALGORITHMS; COMPUTER SIMULATION; CONSTRAINT THEORY; GEOMETRY; SEMICONDUCTOR DEVICE MANUFACTURE; THREE DIMENSIONAL COMPUTER GRAPHICS;

DELAUNAY REFINEMENT TECHNIQUE; DELAUNAY TRIANGULATION; MESH GENERATION; SCHONHARDT POLYHEDRON; STEINER POINT;

COMPUTER AIDED DESIGN;

EID: 0033311446     PISSN: 09168524     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (48)

1. G. Garrctön, L. Villablanca, N. Strecker, and W. Fichtner, A hybrid approach for building 2D and 3D conforming Delaunay meshes suitable for process and device simulation, in Simulation of Semiconductor Processes and Devices, cds. K. De Meyer and S. Biesemans, pp. 185-188, Springer, Wien, New York, 1998.
2. V. Axelrad, Grid quality and its influence on accuracy and convergence in device simulation, IEEE 0278-0070, 1998.
3. V. Moroz, S. Motzny, and K. Lilja, A boundary conforming mesh generation algorithm for simulation of devices with complex geometry, Proc. Simulation of Semiconductor Processes and Devices, pp.293-295, 1997.
4. K. Lilja, A 3D mesh generation method for the simulation of semiconductor processes and devices, Proc. MSM, Santa Clara, 1998.
5. P. Fleischmann, R. Sabelka, A. Stach, R. Strasser, and S. Selberherr, Grid generation for three-dimensional process and device simulation, Proc. Simulation of Semiconductor Processes and Devices, pp.161-166, 1996.
6. N. Kotani, TOAD in Selete, in Simulation of Semiconductor Processes and Devices, eds. K. De Meyer and S. Biesemans, pp.3-7, Springer, Wien, New York, 1998.
7. |7] R. Strasser and S. Selberherr, Parallel and distributed TCAD simulations using dynamic load balancing, in Simulation of Semiconductor Processes and Devices, cds. K. De Meyer and S. Biesemans, pp.89-92, Springer, Wien, New York, 1998.
8. G. Butlin and C. Stops, CAD data repair, Proc. 5th International Meshing Roundtable, Sandia National Labs, pp.712, Pittsburgh, 1996.
9. R.J. Donaghy, W. McCune, S.J. Bridgett, G.G. Armstrong, D.J. Robinson, and R.M. McKcag, Dimensional reduction of analysis models, Proc. 5th International Meshing Roundtable, Sandia National Labs, pp.307-320, Pittsburgh, 199G.
10. T. Syo, Y. Akiyama, S. Kumashiro, I. Yokota, and S. Asada, A triangular mesh with the interface protection layer suitable for the diffusion simulation, Proc. Simulation of Semiconductor Processes and Devices, pp.173-174, 1996.
11. M. Rottinger, Generation of triangular grids in MINIMOSNT, Annual Review, Institute for Microelectronics, Vienna, 1997.
12. [12) J.R. Shcwchuk, TVianglc: Engineering a 2D quality mesh generator and Delaunay triangulator, First Workshop on Applied Computational Geometry, ACM, pp. 12-1-133 Philadelphia, 1990.
13. R. Löhner and P. Parilch, Three-dimensional grid generation by the advancing front method, Int. J. Nijmer. Meths. Fluids., vol.8, pp.1135-1149, 1988.
14. P.J. Frey, H. Borouchaki, and P.L.George, Dclaunay Tetrahedralization using an advancing-front approach, Proc. 5th International Meshing Roundtable, Sandia National Labs, pp.31-43, Pittsburgh, 1996.
15. M. Bern and D. Eppstein, Mesh generation and optimal triangulation, in Computing in Euclidean Geometry, eds. F.K. Hwang and D.-Z. Du, pp.201-201, World Scientific, 1992.
16. E. Schönhardt, Über die Zerlegung von Dreieckspolycdern in Tetraeder, Mathematische Annalen, vol.98, pp.309-312, 1928.
17. J.R. Shewchuk, A condition guaranteeing the existence of higher-dimensional constrained Delaunay triangulations, Proc. 14th Annual Symposium on Computational Geometry, pp.70-85, 1998.
18. J.R. Shewchuk, Tetrahedral mesh generation by Delaunay refinement, Proc. 14th Annual Symposium on Computational Geometry, pp.86-95, 1998.
19. G.L. Miller, D. Talmor, S. Teng, N. Walkington, and H. Wang, Control volume meshes using sphere packing, Proc. 5th International Meshing Roundtable, Sandia National Labs, Pittsburgh, pp.47-62, 1996.
20. Y. Kallinderis, A. Khawaja, and H. McMorris, Hybrid prismatic/tetrahedral grids for turbomaschinery applications, Proc. Cth International Meshing Roundtable, Sandia National Labs, Park City, pp.21-31, 1997.
21. K. Tanaka, A. Notsu, and H. Matsumoto, A new approach to mesh generation for complex 3D semiconductor device structures, Proc. Simulation of Semiconductor Processes and Devices, pp. 167-168, 1996.
22. B. Joe, Construction of three-dimensional improvedquality triangulations using local transformations, SIAM: J. Sei. Comput., vol.10, no.6, pp.1292-1307, 1995.
23. D. Adalsteinson and J.A. Sethian, A fast level set method for propagating interfaces, J. Comp. Phys., vol.118, pp.269-277, 1995.
24. T. Chen, D.W. Yergeau, and R.W. Dutton, A common mesh implementation for both static and moving boundary process simulations, in Simulation of Semiconductor Processes and Devices, eds. K. De Meyer and S. Bicscmans, pp. 101-104, Springer, Wien, New York, 1998.
25. F.J. Bossen and P.S. Hcckbert, A pliant method for anisotropic mesh generation, Proc. 5th International Meshing Roundtable, Sandia National Labs, Pittsburgh, pp.63-74, 1996.
26. T. Fang and L.A. Piegl, Delaunay triangulation in three dimensions, IEEE Comput. Graphics & Appl., vol.15, no.3, pp.62-69, 1995.
27. P. Fleischmann and S. Selbcrherr, Three-dimensional Delaunay mesh generation using a modified advancing front approach, Proc. 6th International Meshing Roundtable, Sandia National Labs, Park City, pp.267-276, 1997.
28. D.F. Watson, Computing the n-dimensional Dclaunay tessclation with application to Voronoi polytopes, Computer Journal, vol.24, no.2, pp.107-172, 1981.
29. F. Hermeline, Triangulation automatique d'un polyèdre en dimension N, RAIRO Analyse Numérique, vol.16, no.3, pp.211-242, 1982.
30. P. Cignoni, C. Montani, R. Perego, and R. Scopigno, Parallel 3D Dclaunay triangulation, in EUROGRAPHICS, vol.12, eds. R.J. Hubbold and R. Juan, p.C-129, Eurographics Association, Blackwell Publishers, 1993.
31. P. Krysl and M. Ortiz, Generation of tetrahedral finite element meshes: Variational Delaunay approach, Proc. 7th International Meshing Roundtable, Sandia National Labs, Dearborn, pp.272-284, 1998.
32. P. Fleischmann and S. Selberherr, Fully unstructured Delaunay mesh generation using a modified advancing front approach for applications in technology CAD, IEEE Trans.Semiconductor Technology Modeling & Simulation, http://www.ieee.org/journal/tcad/accepted/, 1997.
33. L.P. Chew, Guaranteed-quality triangular meshes, Tech. Rep. TR-89-983, Cornell University, 1989.
34. L.P. Chew, Guaranteed-quality Delaunay meshing in 3D, Proc. 13th Annual Symposium on Computational Geometry, ACM, pp.391-393, 1997.
35. J. Ruppert, A Delaunay refinement algorithm for quality 2-dimensional mesh generation, Journal of Algorithms, vol.18, pp.548-585, 1995.
36. P. Fleischmann and S. Selberherr, A new approach to fully unstructured three-dimensional Delaunay mesh generation with improved element quality, Proc. Simulation of Semiconductor Processes and Devices, pp. 129-130, 1996.
37. J.R. Shewchuk, Adaptive precision floating-point arithmetic and fast robust geometric predicates, Discrete & Computational Geometry, vol.18, no.3, pp.305-363, 1997.
38. R. Sabelka, R. Martins, and S. Selberherr, Accurate layout-based interconnect analysis, in Simulation of Semiconductor Processes and Devices, eds. K. De Meyer and S. Biesemans pp.33G-339, Springer, Wien, New York, 1998.
39. M. Radi, E. Leitner, E. Hollensteiner, and S. Selberherr, AMIGOS: Analytical model interface & general objectoriented solver, Proc. Simulation of Semiconductor Processes and Devices, pp.331-334, 1997.
40. J. Mar, "The application of TCAD in industry," SISPAD, Digest of Technical Papers, pp.139-145, 1996.
41. C.A. Mead and L. Comvay, "Introduction to VLSI Systems," Addison Wesley, New York, 1980.
42. A. Misaka, A. Goda, K. Matsuoka, II. Umimoto, and S. Odanaka," "A statistical critical dimension control at a CMOS cell level," IEDM, Digest of Technical Papers, pp.631-634, 1996.
43. A. Misaka and S. Odanaka, "Optical proximity correction considering process latitude," in Proceedings of SPIE Symposium on Optical Microlithography vol.3679, Santa Clara, 1999.
44. B. Davari, "CMOS technology scaling, 0.1/im and beyond," IEDM, Digest of Technical Papers, pp.555-558, 1996.
45. K. Yamashita and S. Odanaka, ''Interconnect scaling scenario using a chip level interconnect model," VLSI Tech. Symp., Digest of Technical Papers, pp.53-54, 1997.
46. T. Sakurai, "Closed-form expressions for interconnect delay, coupling, and crosstalk in VLSI's," IEEE Trans. Electron Devices, vol.40, no.l, pp.118-124, 1993.
47. J.A. Davis, V.K. De, and J. Meindl, "A stochastic wirelength distribution for gigascale interconnect (GSI)-Part-I: Derivation and validation," IEEE Trans. Electron Devices, vol.45, pp.580-589, March 1998.
48. "National Technology Roadmap for Semiconductors," Semiconductor Industry Association, 1997.