Solder joint reliability analysis of a wafer-level CSP assembly with cu studs formed on solder pads

Journal of the Chinese Institute of Engineers, Transactions of the Chinese Institute of Engineers,Series A/Chung-kuo Kung Ch'eng Hsuch K'an

Volumn 26, Issue 4, 2003, Pages 467-479

  Chang, Kuo Chin ^a   Chiang, Kuo Ning ^a  

^a NATIONAL TSING HUA UNIVERSITY   (Taiwan)

Author keywords

Cu stud; Nonlinear finite element method; Solder joint reliability; WLCSP

Indexed keywords

COMPUTER SIMULATION; COPPER; FATIGUE OF MATERIALS; FINITE ELEMENT METHOD; RELIABILITY; SOLDERED JOINTS; STUDS (FASTENERS); THERMAL CYCLING; THERMAL STRESS;

SOLDER JOINT RELIABILITY; WAFER LEVEL CHIP SIZE PACKAGING;

CHIP SCALE PACKAGES;

EID: 0038454550     PISSN: 02533839     EISSN: 21587299     Source Type: Journal    
DOI: 10.1080/02533839.2003.9670800     Document Type: Article

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