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Volumn 5, Issue , 2003, Pages

Systematic test program generation for SoC testing using embedded processor

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTATIONAL METHODS; COMPUTER SOFTWARE; EMBEDDED SYSTEMS;

EID: 0038420014     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (7)

References (18)
  • 3
    • 0032317873 scopus 로고    scopus 로고
    • Modular logic built-in self-test for IP cores
    • J. Rajski and J. Tyszer, "Modular Logic Built-in Self-Test for IP Cores," in Proc. Int. Test Conf. (ITC'98), pp. 313-321, 1998.
    • (1998) Proc. Int. Test Conf. (ITC'98) , pp. 313-321
    • Rajski, J.1    Tyszer, J.2
  • 5
  • 6
    • 0033307908 scopus 로고    scopus 로고
    • Testing a system-on-a-chip with embedded microprocessor
    • R. Rajsuman, "Testing a System-on-a-Chip with Embedded Microprocessor," in Proc. Int. Test Conf. (ITC'99), pp. 499-508, 1999.
    • (1999) Proc. Int. Test Conf. (ITC'99) , pp. 499-508
    • Rajsuman, R.1
  • 9
    • 0031276326 scopus 로고    scopus 로고
    • Arithmetic built-in self-test for DSP cores
    • K. Radeka, J. Rajski and J. Tyszer, "Arithmetic Built-in Self-Test for DSP Cores," IEEE Trans. On CAD/ICAS, vol. 16, no. 11, pp. 1358-1368, 1997.
    • (1997) IEEE Trans. On CAD/ICAS , vol.16 , Issue.11 , pp. 1358-1368
    • Radeka, K.1    Rajski, J.2    Tyszer, J.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.