An efficient BIST method for testing of embedded SRAMs

ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings

Volumn 5, Issue , 2001, Pages 73-76

  Tehranipour, M H ^a   Navabi, Z ^a   Fakhraie, S M ^a  

^a UNIVERSITY OF TEHRAN   (Iran)

Author keywords

[No Author keywords available]

Indexed keywords

PROGRAM DIAGNOSTICS; STATIC RANDOM ACCESS STORAGE; TESTING; ALGORITHMS; COMPUTER HARDWARE; COMPUTER SOFTWARE; DATA STORAGE EQUIPMENT; MICROPROCESSOR CHIPS;

DATA RETENTION TESTS; EMBEDDED SRAM; EMBEDDED SRAMS; HARDWARE AND SOFTWARE; HARDWARE OVERHEADS; MEMORY TESTING; TEST ALGORITHMS; TEXAS INSTRUMENTS;

SOFTWARE TESTING; STATIC RANDOM ACCESS STORAGE;

BUILT-IN SELF-TEST (BIST); MEMORY TESTING TECHNIQUES;

EID: 0035007164     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/iscas.2001.921988     Document Type: Conference Paper

References (8)

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