Mixed-mode simulation approach to characterize the circuit delay sensitivity to implant dose variations

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 22, Issue 6, 2003, Pages 742-747

  Srinivasaiah, H C ^a   Bhat, Navakanta ^a  

^a INDIAN INSTITUTE OF SCIENCE   (India)

Author keywords

Circuit delay; CMOS technology; Disposable spacer; Mixed mode simulation; Sensitivity analysis

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; GATES (TRANSISTOR); OPTIMIZATION; SENSITIVITY ANALYSIS; THIN FILM TRANSISTORS;

MIXED MODE SIMULATION;

DELAY CIRCUITS;

EID: 0037704235     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2003.811453     Document Type: Conference Paper

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