Modern test techniques: Tradeoffs, synergies, and scalable benefits

Journal of Electronic Testing: Theory and Applications (JETTA)

Volumn 19, Issue 2, 2003, Pages 125-135

  Volkerink, Erik H ^a   Khoche, Ajay ^a   Rivoir, Jochen ^a   Hilliges, Klaus D ^a  

^a AGILENT LABORATORIES   (United States)

Author keywords

ATE; Bandwidth matching; BIST; Compression; DFT; Low cost test; Multi site; Probecard; Reduced pin count; Test economics

Indexed keywords

AUTOMATIC TESTING; BANDWIDTH; COST BENEFIT ANALYSIS; MATHEMATICAL MODELS; MICROPROCESSOR CHIPS; OPTIMIZATION;

AUTOMATIC TEST EQUIPMENT; BANDWIDTH MATCHING; MULTISITE TEST; REDUCED PIN COUNT TEST; TEST ECONOMICS; TEST VECTOR COMPRESSION;

INTEGRATED CIRCUIT TESTING;

EID: 0037378652     PISSN: 09238174     EISSN: None     Source Type: Journal    
DOI: 10.1023/A:1022829321216     Document Type: Article

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