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Volumn , Issue , 1999, Pages 113-122

Applications of semiconductor test economics, and multisite testing to lower cost of test

Author keywords

[No Author keywords available]

Indexed keywords

AUTOMATIC TESTING; CALCULATIONS; COST BENEFIT ANALYSIS; COST EFFECTIVENESS; RELIABILITY; SEMICONDUCTOR DEVICE MODELS; THROUGHPUT; YIELD STRESS;

EID: 0033353560     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (30)

References (16)
  • Reference 정보가 존재하지 않습니다.

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.