The partial silicon-on-insulator technology for RF power LDMOSFET devices and on-chip microinductors

IEEE Transactions on Electron Devices

Volumn 49, Issue 12, 2002, Pages 2271-2278

  Ren, Changhong ^a,b   Cai, Jun ^b   Liang, Yung C ^a   Ong, Pick Hong ^a   Balasubramanian, N ^b   Sin, Johnny K O ^c  

^a NATIONAL UNIVERSITY OF SINGAPORE   (Singapore)

^b INSTITUTE OF MICROELECTRONICS   (Singapore)

^c HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Hong Kong)

Author keywords

CMOS process; LDMOSFET; Microinductor; Partial SOI; RFIC; SOI

Indexed keywords

CAPACITANCE; CMOS INTEGRATED CIRCUITS; ELECTRIC INDUCTORS; HETEROJUNCTIONS; LEAKAGE CURRENTS; SEMICONDUCTOR DEVICE STRUCTURES; SILICON ON INSULATOR TECHNOLOGY; SILICON WAFERS; SUBSTRATES;

LATERAL DOUBLE-DIFFUSION MOSFET DEVICES; ON-CHIP MICROINDUCTORS; PARTIAL SILICON-ON-INSULATOR TECHNOLOGY;

MOSFET DEVICES;

EID: 0037004053     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2002.807459     Document Type: Article

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