Electron and hole mobility enhancement in strained SOI by wafer bonding

IEEE Transactions on Electron Devices

Volumn 49, Issue 9, 2002, Pages 1566-1571

  Huang, Lijuan ^b   Chu, Jack O ^b   Goma, S A ^b   D'Emic, C P ^b   Koester, Steven J ^a,b   Canaperi, Donald F ^b   Mooney, Patricia M ^b   Cordes, S A ^b   Speidell, James L ^b   Anderson, R M ^b   Wong, H S Philip ^a,b  

^a IEEE   (United States)

^b IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

CMOS; Mobility; SiGe; Silicon on insulator (SOI); Strained silicon; Wafer bending

Indexed keywords

DRAIN CURRENT; DRAIN VOLTAGE; LAYER SPLITTING; SILICON GERMANIUM; STRAIN RELAXATION; TRIPLE-AXIS X RAY DIFFRACTION;

BONDING; CMOS INTEGRATED CIRCUITS; CURRENT VOLTAGE CHARACTERISTICS; ELECTRON MOBILITY; HOLE MOBILITY; MOSFET DEVICES; RELAXATION PROCESSES; SCANNING ELECTRON MICROSCOPY; SEMICONDUCTING SILICON COMPOUNDS; SILICON WAFERS; TRANSMISSION ELECTRON MICROSCOPY; X RAY DIFFRACTION ANALYSIS;

SILICON ON INSULATOR TECHNOLOGY;

EID: 0036712434     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2002.802675     Document Type: Article

References (16)

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