A novel and efficient timing-driven global router for standard cell layout design based on critical network concept

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 1, Issue , 2002, Pages

  Jing, Tong ^a   Hong, Xian Long ^a   Bao, Hai Yun ^a   Cai, Yi Ci ^a   Xu, Jing Yu ^a   Gu, Jun ^a  

^a TSINGHUA UNIVERSITY   (China)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; C (PROGRAMMING LANGUAGE); COMPUTER SIMULATION; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT TESTING; MATHEMATICAL MODELS; OPTIMIZATION; UNIX;

CRITICAL-PATH-BASED METHOD; GLOBAL ROUTING ALGORITHM; NETS-BASED METHOD; SAKURAI-DELAY-BASED TIMING MODEL; STANDARD CELL LAYOUT DESIGN; STEINER TREE PROBLEM;

INTERCONNECTION NETWORKS;

EID: 0036280867     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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