Timing optimization for multisource nets: characterization and optimal repeater insertion

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 18, Issue 2-3, 1999, Pages 322-331

  Lillis, John ^a,b   Cheng, Chung Kuan ^a,b  

^a 1120 Science and Engineering Offices   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Buffering; Dynamic programming; Interconnect; Optimization; Timing

Indexed keywords

MULTISOURCE NETS; OPTIMAL REPEATER INSERTION;

ALGORITHMS; DYNAMIC PROGRAMMING; ELECTRIC NETWORK ANALYSIS; ELECTRIC NETWORK TOPOLOGY; INTERCONNECTION NETWORKS;

BUFFER CIRCUITS;

EID: 0033095273     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.748162     Document Type: Article

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