Reduction of self-heating effect on SOIM devices

Microelectronics Reliability

Volumn 42, Issue 1, 2002, Pages 61-66

  Roig, J ^a   Flores, D ^a   Vellvehi, M ^a   Rebollo, J ^a   Millan, J ^a  

^a INSTITUTO DE MICROELECTRÓNICA DE BARCELONA   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; ELECTRIC BREAKDOWN; HEAT RESISTANCE; THERMAL CONDUCTIVITY;

BURIED OXIDE LAYERS (BOX);

SILICON ON INSULATOR TECHNOLOGY;

EID: 0036133809     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0026-2714(01)00116-0     Document Type: Article

References (22)

1. Intelligent power IC with partial SOI structure
2. Comparison of self-heating effects in bulk-silicon and SOI high-voltage devices
3. Thermal behaviour of lateral power devices on SOI substrates
4. Self-heating effect in lateral DMOS on SOI
5. Spatial temperature profiles due to nonuniform self-heating in LDMOS's in thin SOI
6. High voltage silicon-on-insulator (SOI) MOSFETs
7. Lateral insulated gate bipolar transistor (LIGBT) structure based on partial isolation SOI technology
8. From SOI to SOIM technology: Application for specific semiconductor processes
9. Extension of resurf principle to dielectrically isolated power devices
10. Analytical approach to breakdown voltage in thin film SOI power MOSFETs
11. Realisation of high breakdown voltage (<700 V) in thin SOI devices
12. Analytical model for the electric field distribution in SOI RESURF and TMBS structures
13. An analytical model for minimum drift region length of SOI RESURF diodes
14. Optimisation of the drift length in SOI RESURF LDMOS: Analytic approach to the lateral breakdown
15. Analytical model for surface field distribution of SOI RESURF devices
16. Device characteristics of a 30-V-class thin-film SOI power MOSFET
17. Thermal and package performance limitations in LDMOSFET's for RFIC applications
18. SmartCut®: The basic fabrication process for Unibond® SOI Wafers
19. Bonding constraints and defect formation at interfaces between crystalline silicon and advanced single layer and composite gate dielectrics