Analytical approach to breakdown voltages in thin-film SOI power MOSFETs

Solid-State Electronics

Volumn 39, Issue 1, 1996, Pages 95-100

  Kim, Il Jung ^a,b   Matsumoto, Satoshi ^b   Sakai, Tatsuo ^b   Yachi, Toshiaki ^b  

^a MITSUBISHI ELECTRIC CORPORATION   (Japan)

^b NTT CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CARRIER CONCENTRATION; COMPUTER SIMULATION; CRITICAL CURRENTS; ELECTRIC BREAKDOWN OF SOLIDS; ESTIMATION; NUMERICAL ANALYSIS; SEMICONDUCTOR DEVICE MODELS; SILICON ON INSULATOR TECHNOLOGY; SPATIAL VARIABLES MEASUREMENT; THIN FILMS;

BURIED OXIDE THICKNESS; CRITICAL IMPURITY CONCENTRATION; DEVICE PARAMETERS; DRIFT REGION LENGTH; SILICON LAYER THICKNESS; THIN FILM SILICON ON INSULATOR POWER MOSFET;

MOSFET DEVICES;

EID: 0029735199     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/0038-1101(95)00090-G     Document Type: Article

References (11)

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