A highly reliable ferroelectric memory technology with SrBi2Ta2O9-based material and metal covering cell structure

IEEE Transactions on Electron Devices

Volumn 48, Issue 6, 2001, Pages 1231-1236

  Fujii, Eiji ^a   Judai, Yuji ^a   Ito, Toyoji ^a   Kutsunai, Toshie ^a   Nagano, Yoshihisa ^a   Noma, A ^a   Nasu, Toru ^a   Izutsu, Y ^a   Mikawa, Takumi ^a   Yasuoka, H ^a   Azuma, M ^a   Shimada, Y ^a   Sasai, Y ^a   Sato, K ^a   Otsuki, T ^a  

^a PANASONIC CORPORATION   (Japan)

Author keywords

Ferroelectric memory; Multilevel; Plasma silicon nitride; Reliability

Indexed keywords

CMOS INTEGRATED CIRCUITS; DEPOSITION; FERROELECTRIC MATERIALS; FERROELECTRIC THIN FILMS; POLARIZATION; RANDOM ACCESS STORAGE; SEMICONDUCTOR SUPERLATTICES; SILICON NITRIDE; STRONTIUM COMPOUNDS;

FERROELECTRIC MEMORY; LATERAL BIPOLAR SNAPBACK CHARACTERISTICS;

SEMICONDUCTOR STORAGE;

EID: 0035366294     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.925253     Document Type: Article

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