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Volumn 48, Issue 2, 2001, Pages 300-306

Characterization of hot-hole injection induced SILC and related disturbs in flash memories

Author keywords

[No Author keywords available]

Indexed keywords

CARRIER CONCENTRATION; DATA STORAGE EQUIPMENT; ELECTRON TUNNELING; INDUCED CURRENTS; LEAKAGE CURRENTS; LOGIC GATES;

EID: 0035250373     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.902731     Document Type: Article
Times cited : (10)

References (21)
  • 4
    • 33749946962 scopus 로고    scopus 로고
    • Read-disturb degradation mechanism due to electron trapping in the tunnel oxide for low-voltage Flash memories
    • M. Kato et al., Read-disturb degradation mechanism due to electron trapping in the tunnel oxide for low-voltage Flash memories in IEDM Tech. Dig., 1994, pp. 458.
    • In IEDM Tech. Dig., 1994, Pp. 458.
    • Kato, M.1
  • 6
    • 0029725009 scopus 로고    scopus 로고
    • Read disturb degradation mechanism for source erase Flash memories
    • S. Shuto et al., Read disturb degradation mechanism for source erase Flash memories in Symp. VLSI Tech., 1996, p. 242.
    • In Symp. VLSI Tech., 1996, P. 242.
    • Shuto, S.1
  • 7
    • 0019535677 scopus 로고    scopus 로고
    • Observation of positively charged state generation near the Si/SiO2 interface during Fowler-Nordheim tunneling
    • J. Maserjian and N. ZamaniObservation of positively charged state generation near the Si/SiO2 interface during Fowler-Nordheim tunneling J. Vac. Sei. Technol, vol. 20, pp. 743-764, 1982.
    • J. Vac. Sei. Technol, Vol. 20, Pp. 743-764, 1982.
    • Maserjian, J.1    Zamani, N.2
  • 13
    • 0028195633 scopus 로고    scopus 로고
    • Stress-induced low-level leakage mechanism in ultrathin silicon dioxide films caused by neutral oxide trap generation
    • M. Kimura and H. KoyamaStress-induced low-level leakage mechanism in ultrathin silicon dioxide films caused by neutral oxide trap generation in Proc. IEEE Reliability Phys. Symp., 1994, pp. 167-172.
    • In Proc. IEEE Reliability Phys. Symp., 1994, Pp. 167-172.
    • Kimura, M.1    Koyama, H.2
  • 17
    • 0023593246 scopus 로고    scopus 로고
    • A flash-erase EEPROM cell with an asymmetric source and drain structure
    • H. Kume et al., A flash-erase EEPROM cell with an asymmetric source and drain structure in 1EDM Tech. Dig., 1987, pp. 560-563.
    • In 1EDM Tech. Dig., 1987, Pp. 560-563.
    • Kume, H.1
  • 20
    • 0030655380 scopus 로고    scopus 로고
    • A new oxide damage characterization technique for evaluating hot carrier reliability of flash memory cell after long-term program/erase cycles
    • S. S. Chung, C. M. Yih, S. M. Cheng, and M. S. LiangA new oxide damage characterization technique for evaluating hot carrier reliability of flash memory cell after long-term program/erase cycles in Proc. Symp. VLSI Tech., 1997, pp. 111-112.
    • In Proc. Symp. VLSI Tech., 1997, Pp. 111-112.
    • Chung, S.S.1    Yih, C.M.2    Cheng, S.M.3    Liang, M.S.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.