Realization-independent ATPG for designs with unimplemented blocks

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 20, Issue 2, 2001, Pages 290-306

  Kim, Hyungwon ^b   Hayes, John P ^a,c  

^a IEEE

^b SYNOPSYS INC   (United States)

^c UNIVERSITY OF MICHIGAN   (United States)

Author keywords

ATPG; Core testing; Functional faults; Intellectual property; Realization independent testing; Universal tests

Indexed keywords

COMPUTATIONAL COMPLEXITY; COMPUTER SIMULATION; FAILURE ANALYSIS; INTEGRATED CIRCUIT TESTING; INTELLECTUAL PROPERTY; MATHEMATICAL MODELS;

AUTOMATIC TEST PATTERN GENERATION; CORE TESTING; FUNCTIONAL FAULT MODEL; REALIZATION INDEPENDENT BLOCK TESTING FOR CORES;

INTEGRATED CIRCUIT LAYOUT;

EID: 0035248749     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.908472     Document Type: Article

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